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* irq/0/smp_affinity =3 doesn't seem to work
@ 2006-12-05 16:30 Raz Ben-Jehuda(caro)
2006-12-05 16:32 ` Arjan van de Ven
0 siblings, 1 reply; 4+ messages in thread
From: Raz Ben-Jehuda(caro) @ 2006-12-05 16:30 UTC (permalink / raw)
To: Linux Kernel
hello.
I have a dual cpu AMD machine, I noticed that
only one timer0 is working in /proc/interrutps.
setting proc/irq/0/smp_affinity to 3 does make
any difference.
setting smp_affinity to 2 does move the inetrrupts.
the above applys with or withour irq_balancer .
thank you
--
Raz
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: irq/0/smp_affinity =3 doesn't seem to work
2006-12-05 16:30 irq/0/smp_affinity =3 doesn't seem to work Raz Ben-Jehuda(caro)
@ 2006-12-05 16:32 ` Arjan van de Ven
2006-12-05 19:14 ` Raz Ben-Jehuda(caro)
0 siblings, 1 reply; 4+ messages in thread
From: Arjan van de Ven @ 2006-12-05 16:32 UTC (permalink / raw)
To: Raz Ben-Jehuda(caro); +Cc: Linux Kernel
On Tue, 2006-12-05 at 18:30 +0200, Raz Ben-Jehuda(caro) wrote:
> hello.
>
> I have a dual cpu AMD machine, I noticed that
> only one timer0 is working in /proc/interrutps.
> setting proc/irq/0/smp_affinity to 3 does make
> any difference.
if you set it to 3 then the chipset gets to decide where the irq goes.
Many decide to send it to the first cpu.
(not that it matters, the timer is so low frequency that it can go
anywhere without problems)
--
if you want to mail me at work (you don't), use arjan (at) linux.intel.com
Test the interaction between Linux and your BIOS via http://www.linuxfirmwarekit.org
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: irq/0/smp_affinity =3 doesn't seem to work
2006-12-05 16:32 ` Arjan van de Ven
@ 2006-12-05 19:14 ` Raz Ben-Jehuda(caro)
2006-12-05 19:19 ` Arjan van de Ven
0 siblings, 1 reply; 4+ messages in thread
From: Raz Ben-Jehuda(caro) @ 2006-12-05 19:14 UTC (permalink / raw)
To: Arjan van de Ven; +Cc: Linux Kernel
On 12/5/06, Arjan van de Ven <arjan@infradead.org> wrote:
> On Tue, 2006-12-05 at 18:30 +0200, Raz Ben-Jehuda(caro) wrote:
> > hello.
> >
> > I have a dual cpu AMD machine, I noticed that
> > only one timer0 is working in /proc/interrutps.
> > setting proc/irq/0/smp_affinity to 3 does make
> > any difference.
>
> if you set it to 3 then the chipset gets to decide where the irq goes.
> Many decide to send it to the first cpu.
>
> (not that it matters, the timer is so low frequency that it can go
> anywhere without problems)
>
> --
> if you want to mail me at work (you don't), use arjan (at) linux.intel.com
> Test the interaction between Linux and your BIOS via http://www.linuxfirmwarekit.org
>
>
thanks Arjan.
Yet something is not clear to me.
To the best of my knowledge , each cpu run its own schedule routine.
So, if only cpu0 gets timer0 interrupts, how does cpu1
gets to run the schedule function ?
what interrupts cpu1' current task ?
raz
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: irq/0/smp_affinity =3 doesn't seem to work
2006-12-05 19:14 ` Raz Ben-Jehuda(caro)
@ 2006-12-05 19:19 ` Arjan van de Ven
0 siblings, 0 replies; 4+ messages in thread
From: Arjan van de Ven @ 2006-12-05 19:19 UTC (permalink / raw)
To: Raz Ben-Jehuda(caro); +Cc: Linux Kernel
On Tue, 2006-12-05 at 21:14 +0200, Raz Ben-Jehuda(caro) wrote:
> On 12/5/06, Arjan van de Ven <arjan@infradead.org> wrote:
> > On Tue, 2006-12-05 at 18:30 +0200, Raz Ben-Jehuda(caro) wrote:
> > > hello.
> > >
> > > I have a dual cpu AMD machine, I noticed that
> > > only one timer0 is working in /proc/interrutps.
> > > setting proc/irq/0/smp_affinity to 3 does make
> > > any difference.
> >
> > if you set it to 3 then the chipset gets to decide where the irq goes.
> > Many decide to send it to the first cpu.
> >
> > (not that it matters, the timer is so low frequency that it can go
> > anywhere without problems)
> >
> > --
> > if you want to mail me at work (you don't), use arjan (at) linux.intel.com
> > Test the interaction between Linux and your BIOS via http://www.linuxfirmwarekit.org
> >
> >
> thanks Arjan.
>
> Yet something is not clear to me.
> To the best of my knowledge , each cpu run its own schedule routine.
> So, if only cpu0 gets timer0 interrupts, how does cpu1
> gets to run the schedule function
> what interrupts cpu1' current task ?
the scheduler code uses IPI's for that...
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2006-12-05 19:19 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2006-12-05 16:30 irq/0/smp_affinity =3 doesn't seem to work Raz Ben-Jehuda(caro)
2006-12-05 16:32 ` Arjan van de Ven
2006-12-05 19:14 ` Raz Ben-Jehuda(caro)
2006-12-05 19:19 ` Arjan van de Ven
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