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From: Nicolas Mailhot <nicolas.mailhot@laposte.net>
To: Krzysztof Halasa <khc@pm.waw.pl>
Cc: Mikko Tiihonen <mikko.tiihonen@iki.fi>,
	linux-kernel@vger.kernel.org, ranma@tdiedrich.de,
	om.turyx@gmail.com
Subject: Re: [PATCH 1/5] RT kernel: force detect HPET from PCI space
Date: Sat, 31 Mar 2007 13:36:26 +0200	[thread overview]
Message-ID: <1175340987.4174.9.camel@rousalka.dyndns.org> (raw)
In-Reply-To: <m3bqi9u2an.fsf@maximus.localdomain>

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[adding some people in CC that expressed interest in the problem before]

Le samedi 31 mars 2007 à 12:37 +0200, Krzysztof Halasa a écrit :
> Nicolas Mailhot <nicolas.mailhot@laposte.net> writes:
> 
> > Oh, is looks so close to my system
> >
> > 00:01.0 ISA bridge: nVidia Corporation CK804 ISA Bridge (rev a3)
> > 00: de 10 50 00 0f 00 a0 00 a3 00 01 06 00 00 80 00
> > 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
> > 20: 00 00 00 00 00 00 00 00 00 00 00 00 58 14 11 0c
> > 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
> > 40: 58 14 11 0c 00 f0 ff fe fa 3e ff 00 fa 3e ff 00
> >                 ^^^^^^^^^^^
> >                 Usual HPET base address
> > 50: fa 3e ff 00 00 5a 62 02 00 00 00 01 00 00 ff ff
> > 60: 01 10 00 00 01 14 00 00 01 18 00 00 00 00 f9 ff
> > 70: 10 00 ff ff c1 00 00 00 00 00 04 19 18 d2 80 0d
> >                 ^^
> >                 c1 => HPET disabled (according to your reference)
> >
> > I don't have an HPET toggle in my bios
> 
> For reference: HPET enabled in BIOS, MSI K9N platinum board:
> 
> dmesg | grep HPET
> ACPI: HPET (v001 A M I  OEMHPET0 0x02000701 MSFT 0x00000097)
> 	@ 0x000000003ffd5480
> ACPI: HPET id: 0x10de8201 base: 0xfed00000
> time.c: Using 25.000000 MHz WALL HPET GTOD HPET timer.
> 
> 00:01.0 ISA bridge: nVidia Corporation MCP55 LPC Bridge (rev a2)
>         Subsystem: Micro-Star International Co., Ltd. Unknown device 7250
>         Flags: bus master, 66MHz, fast devsel, latency 0
>         I/O ports at 2f00 [size=128]
> 00: de 10 62 03 0f 00 a0 00 a2 00 01 06 00 00 80 00
> 10: 01 2f 00 00 00 00 00 00 00 00 00 00 00 00 00 00
> 20: 00 00 00 00 00 00 00 00 00 00 00 00 62 14 50 72
> 30: 00 00 00 00 00 00 00 00 00 00 00 00 ff 00 00 00
> 40: 62 14 50 72 00 00 d0 fe fa 3e ff 00 fa 3e ff 00
>                 ^^^^^^^^^^^
> Dword at 0x44 indeed seems to be the address
> 
> 50: fa 3e ff 00 00 5a 62 02 00 00 00 01 00 00 fe 3f
> 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f9 ff
> 70: 10 00 ff ff c5 80 00 00 00 00 45 19 00 c6 40 00
>                 ^^
> Enabled = consistent with http://lkml.org/lkml/2006/12/17/69
> 
> 80: 09 20 00 10 1d 08 00 00 f0 00 00 01 f0 00 00 00
> 90: 00 08 00 00 00 00 00 00 21 47 95 86 ef cd ab 00
> a0: 01 00 00 81 00 00 00 00 00 00 00 00 00 00 00 00
>              ^^
> Not sure about 0xa3, though.
> 
> b0: 00 00 00 00 00 0a 7f 0a 00 00 00 00 00 00 00 00
> c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
> d0: 00 00 00 00 00 00 00 00 44 00 00 fe fd d3 00 a0
> e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
> f0: 00 00 00 00 00 00 00 00 10 00 00 00 00 00 00 00

Here is the full reference on my system

00:01.0 ISA bridge: nVidia Corporation CK804 ISA Bridge (rev a3)
        Subsystem: Giga-byte Technology GA-K8N Ultra-9 Mainboard
        Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV- VGASnoop-
ParErr- Stepping- SERR- FastB2B-
        Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort-
<TAbort- <MAbort- >SERR- <PERR-
        Latency: 0
00: de 10 50 00 0f 00 a0 00 a3 00 01 06 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 58 14 11 0c
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
40: 58 14 11 0c 00 f0 ff fe fa 3e ff 00 fa 3e ff 00
50: fa 3e ff 00 00 5a 62 02 00 00 00 01 00 00 ff ff
60: 01 10 00 00 01 14 00 00 01 18 00 00 00 00 f9 ff
70: 10 00 ff ff c1 00 00 00 00 00 04 19 18 d2 80 0d
80: 09 20 00 d8 01 01 00 00 c0 00 00 01 00 00 00 00
90: 00 00 00 00 00 00 00 00 21 64 87 a9 de bc 00 00
a0: 03 00 30 c1 00 00 00 00 00 00 00 00 00 00 00 00
b0: 95 02 f4 02 00 08 5f 08 00 00 00 00 00 00 00 00
c0: 35 82 80 00 00 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 14 10 01 00 00 00 d0 00 80 30 00 20 61 44 44 11
f0: 5a ff 5f bf 00 00 00 c0 10 ff ff ff 00 00 30 07

I'm crazy enough to test a patch if someone cooks it, but I'm way out of
my depth there :)

-- 
Nicolas Mailhot

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  reply	other threads:[~2007-03-31 11:36 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2007-03-30 22:09 [PATCH 1/5] RT kernel: force detect HPET from PCI space Mikko Tiihonen
2007-03-30 22:38 ` Nicolas Mailhot
2007-03-31  8:00   ` Mikko Tiihonen
2007-03-31 10:37   ` Krzysztof Halasa
2007-03-31 11:36     ` Nicolas Mailhot [this message]
2007-03-31 15:00       ` Mikko Tiihonen
  -- strict thread matches above, loose matches on Subject: below --
2007-03-30 16:50 Nicolas Mailhot
2007-03-30 16:59 ` Venki Pallipadi
2007-03-30 17:22   ` Nicolas Mailhot
2007-02-23  1:06 Venkatesh Pallipadi
2007-03-30  9:46 ` Ingo Molnar
2007-03-30 13:36   ` Pallipadi, Venkatesh

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