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* [PATCH v4 0/5] hwrng: add support for i.MX6 rngb
@ 2020-07-15 15:25 Horia Geantă
  2020-07-15 15:26 ` [PATCH v4 1/5] dt-bindings: rng: add RNGB compatibles for i.MX6 SoCs Horia Geantă
                   ` (6 more replies)
  0 siblings, 7 replies; 10+ messages in thread
From: Horia Geantă @ 2020-07-15 15:25 UTC (permalink / raw)
  To: Rob Herring, Shawn Guo, Sascha Hauer, Matt Mackall, Herbert Xu
  Cc: Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team,
	devicetree, linux-arm-kernel, Arnd Bergmann, Greg Kroah-Hartman,
	Martin Kaiser, Marco Felsch, Franck Lenormand, Iuliana Prodan,
	Silvano Di Ninno, linux-crypto, linux-kernel

Add support for RNGB found in some i.MX6 SoCs (6SL, 6SLL, 6ULL, 6ULZ),
based on RNGC driver (drivers/char/hw_random/imx-rngc.c).

This driver claims support also for RNGB (besides RNGC),
and is currently used only by i.MX25.

Note:

Several NXP SoC from QorIQ family (P1010, P1023, P4080, P3041, P5020)
also have a RNGB, however it's part of the CAAM
(Cryptograhic Accelerator and Assurance Module) crypto accelerator.
In this case, RNGB is managed in the caam driver
(drivers/crypto/caam/), since it's tightly related to
the caam "job ring" interface, not to mention CAAM internally relying on
RNGB as source of randomness.

On the other hand, the i.MX6 SoCs with RNGB have a DCP
(Data Co-Processor) crypto accelerator and this block and RNGB
are independent.

Changelog:
v4
-remove unneeded compatible strings from the driver
v3
-mention in the DT binding the compatibility with "fsl,imx25-rngb"
-collected Reviewed-by
v2
-update rngb DT binding with compatible strings for i.MX6 SoCs

Horia Geantă (5):
  dt-bindings: rng: add RNGB compatibles for i.MX6 SoCs
  ARM: dts: imx6sl: fix rng node
  ARM: dts: imx6sll: add rng
  ARM: dts: imx6ull: add rng
  hwrng: imx-rngc: enable driver for i.MX6

 Documentation/devicetree/bindings/rng/imx-rng.txt | 3 +++
 arch/arm/boot/dts/imx6sl.dtsi                     | 2 ++
 arch/arm/boot/dts/imx6sll.dtsi                    | 7 +++++++
 arch/arm/boot/dts/imx6ull.dtsi                    | 7 +++++++
 drivers/char/hw_random/Kconfig                    | 2 +-
 5 files changed, 20 insertions(+), 1 deletion(-)

-- 
2.17.1


^ permalink raw reply	[flat|nested] 10+ messages in thread

* [PATCH v4 1/5] dt-bindings: rng: add RNGB compatibles for i.MX6 SoCs
  2020-07-15 15:25 [PATCH v4 0/5] hwrng: add support for i.MX6 rngb Horia Geantă
@ 2020-07-15 15:26 ` Horia Geantă
  2020-07-15 15:26 ` [PATCH v4 2/5] ARM: dts: imx6sl: fix rng node Horia Geantă
                   ` (5 subsequent siblings)
  6 siblings, 0 replies; 10+ messages in thread
From: Horia Geantă @ 2020-07-15 15:26 UTC (permalink / raw)
  To: Rob Herring, Shawn Guo, Sascha Hauer, Matt Mackall, Herbert Xu
  Cc: Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team,
	devicetree, linux-arm-kernel, Arnd Bergmann, Greg Kroah-Hartman,
	Martin Kaiser, Marco Felsch, Franck Lenormand, Iuliana Prodan,
	Silvano Di Ninno, linux-crypto, linux-kernel

RNGB block is found in some i.MX6 SoCs - 6SL, 6SLL, 6ULL, 6ULZ.
Add corresponding compatible strings.

Note:

Several NXP SoC from QorIQ family (P1010, P1023, P4080, P3041, P5020)
also have a RNGB, however it's part of the CAAM
(Cryptograhic Accelerator and Assurance Module) crypto accelerator.
In this case, RNGB is managed in the caam driver
(drivers/crypto/caam/), since it's tightly related to
the caam "job ring" interface, not to mention CAAM internally relying on
RNGB as source of randomness.

On the other hand, the i.MX6 SoCs with RNGB have a DCP
(Data Co-Processor) crypto accelerator and this block and RNGB
are independent.

Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
 Documentation/devicetree/bindings/rng/imx-rng.txt | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/Documentation/devicetree/bindings/rng/imx-rng.txt b/Documentation/devicetree/bindings/rng/imx-rng.txt
index 405c2b00ccb0..659d4efdd664 100644
--- a/Documentation/devicetree/bindings/rng/imx-rng.txt
+++ b/Documentation/devicetree/bindings/rng/imx-rng.txt
@@ -5,6 +5,9 @@ Required properties:
                "fsl,imx21-rnga"
                "fsl,imx31-rnga" (backward compatible with "fsl,imx21-rnga")
                "fsl,imx25-rngb"
+               "fsl,imx6sl-rngb" (backward compatible with "fsl,imx25-rngb")
+               "fsl,imx6sll-rngb" (backward compatible with "fsl,imx25-rngb")
+               "fsl,imx6ull-rngb" (backward compatible with "fsl,imx25-rngb")
                "fsl,imx35-rngc"
 - reg : offset and length of the register set of this block
 - interrupts : the interrupt number for the RNG block
-- 
2.17.1


^ permalink raw reply	[flat|nested] 10+ messages in thread

* [PATCH v4 2/5] ARM: dts: imx6sl: fix rng node
  2020-07-15 15:25 [PATCH v4 0/5] hwrng: add support for i.MX6 rngb Horia Geantă
  2020-07-15 15:26 ` [PATCH v4 1/5] dt-bindings: rng: add RNGB compatibles for i.MX6 SoCs Horia Geantă
@ 2020-07-15 15:26 ` Horia Geantă
  2020-07-15 15:26 ` [PATCH v4 3/5] ARM: dts: imx6sll: add rng Horia Geantă
                   ` (4 subsequent siblings)
  6 siblings, 0 replies; 10+ messages in thread
From: Horia Geantă @ 2020-07-15 15:26 UTC (permalink / raw)
  To: Rob Herring, Shawn Guo, Sascha Hauer, Matt Mackall, Herbert Xu
  Cc: Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team,
	devicetree, linux-arm-kernel, Arnd Bergmann, Greg Kroah-Hartman,
	Martin Kaiser, Marco Felsch, Franck Lenormand, Iuliana Prodan,
	Silvano Di Ninno, linux-crypto, linux-kernel

rng DT node was added without a compatible string.

i.MX driver for RNGC (drivers/char/hw_random/imx-rngc.c) also claims
support for RNGB, and is currently used for i.MX25.

Let's use this driver also for RNGB block in i.MX6SL.

Fixes: e29fe21cff96 ("ARM: dts: add device tree source for imx6sl SoC")
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
---
 arch/arm/boot/dts/imx6sl.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
index 1c7180f28539..91a8c54d5e11 100644
--- a/arch/arm/boot/dts/imx6sl.dtsi
+++ b/arch/arm/boot/dts/imx6sl.dtsi
@@ -939,8 +939,10 @@
 			};
 
 			rngb: rngb@21b4000 {
+				compatible = "fsl,imx6sl-rngb", "fsl,imx25-rngb";
 				reg = <0x021b4000 0x4000>;
 				interrupts = <0 5 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&clks IMX6SL_CLK_DUMMY>;
 			};
 
 			weim: weim@21b8000 {
-- 
2.17.1


^ permalink raw reply	[flat|nested] 10+ messages in thread

* [PATCH v4 3/5] ARM: dts: imx6sll: add rng
  2020-07-15 15:25 [PATCH v4 0/5] hwrng: add support for i.MX6 rngb Horia Geantă
  2020-07-15 15:26 ` [PATCH v4 1/5] dt-bindings: rng: add RNGB compatibles for i.MX6 SoCs Horia Geantă
  2020-07-15 15:26 ` [PATCH v4 2/5] ARM: dts: imx6sl: fix rng node Horia Geantă
@ 2020-07-15 15:26 ` Horia Geantă
  2020-07-15 15:26 ` [PATCH v4 4/5] ARM: dts: imx6ull: " Horia Geantă
                   ` (3 subsequent siblings)
  6 siblings, 0 replies; 10+ messages in thread
From: Horia Geantă @ 2020-07-15 15:26 UTC (permalink / raw)
  To: Rob Herring, Shawn Guo, Sascha Hauer, Matt Mackall, Herbert Xu
  Cc: Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team,
	devicetree, linux-arm-kernel, Arnd Bergmann, Greg Kroah-Hartman,
	Martin Kaiser, Marco Felsch, Franck Lenormand, Iuliana Prodan,
	Silvano Di Ninno, linux-crypto, linux-kernel

Add node for the RNGB block.

Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
---
 arch/arm/boot/dts/imx6sll.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/boot/dts/imx6sll.dtsi b/arch/arm/boot/dts/imx6sll.dtsi
index fb5d3bc50c6b..0b622201a1f3 100644
--- a/arch/arm/boot/dts/imx6sll.dtsi
+++ b/arch/arm/boot/dts/imx6sll.dtsi
@@ -786,6 +786,13 @@
 				clocks = <&clks IMX6SLL_CLK_MMDC_P0_IPG>;
 			};
 
+			rngb: rng@21b4000 {
+				compatible = "fsl,imx6sll-rngb", "fsl,imx25-rngb";
+				reg = <0x021b4000 0x4000>;
+				interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&clks IMX6SLL_CLK_DUMMY>;
+			};
+
 			ocotp: efuse@21bc000 {
 				#address-cells = <1>;
 				#size-cells = <1>;
-- 
2.17.1


^ permalink raw reply	[flat|nested] 10+ messages in thread

* [PATCH v4 4/5] ARM: dts: imx6ull: add rng
  2020-07-15 15:25 [PATCH v4 0/5] hwrng: add support for i.MX6 rngb Horia Geantă
                   ` (2 preceding siblings ...)
  2020-07-15 15:26 ` [PATCH v4 3/5] ARM: dts: imx6sll: add rng Horia Geantă
@ 2020-07-15 15:26 ` Horia Geantă
  2021-08-17 15:39   ` Frieder Schrempf
  2020-07-15 15:26 ` [PATCH v4 5/5] hwrng: imx-rngc: enable driver for i.MX6 Horia Geantă
                   ` (2 subsequent siblings)
  6 siblings, 1 reply; 10+ messages in thread
From: Horia Geantă @ 2020-07-15 15:26 UTC (permalink / raw)
  To: Rob Herring, Shawn Guo, Sascha Hauer, Matt Mackall, Herbert Xu
  Cc: Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team,
	devicetree, linux-arm-kernel, Arnd Bergmann, Greg Kroah-Hartman,
	Martin Kaiser, Marco Felsch, Franck Lenormand, Iuliana Prodan,
	Silvano Di Ninno, linux-crypto, linux-kernel

Add node for the RNGB block.

Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Reviewed-by: Marco Felsch <m.felsch@pengutronix.de>
---
 arch/arm/boot/dts/imx6ull.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/boot/dts/imx6ull.dtsi b/arch/arm/boot/dts/imx6ull.dtsi
index fcde7f77ae42..9bf67490ac49 100644
--- a/arch/arm/boot/dts/imx6ull.dtsi
+++ b/arch/arm/boot/dts/imx6ull.dtsi
@@ -68,6 +68,13 @@
 				clock-names = "dcp";
 			};
 
+			rngb: rng@2284000 {
+				compatible = "fsl,imx6ull-rngb", "fsl,imx25-rngb";
+				reg = <0x02284000 0x4000>;
+				interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&clks IMX6UL_CLK_DUMMY>;
+			};
+
 			iomuxc_snvs: iomuxc-snvs@2290000 {
 				compatible = "fsl,imx6ull-iomuxc-snvs";
 				reg = <0x02290000 0x4000>;
-- 
2.17.1


^ permalink raw reply	[flat|nested] 10+ messages in thread

* [PATCH v4 5/5] hwrng: imx-rngc: enable driver for i.MX6
  2020-07-15 15:25 [PATCH v4 0/5] hwrng: add support for i.MX6 rngb Horia Geantă
                   ` (3 preceding siblings ...)
  2020-07-15 15:26 ` [PATCH v4 4/5] ARM: dts: imx6ull: " Horia Geantă
@ 2020-07-15 15:26 ` Horia Geantă
  2020-07-23  7:57 ` [PATCH v4 0/5] hwrng: add support for i.MX6 rngb Herbert Xu
  2020-08-17  8:07 ` Shawn Guo
  6 siblings, 0 replies; 10+ messages in thread
From: Horia Geantă @ 2020-07-15 15:26 UTC (permalink / raw)
  To: Rob Herring, Shawn Guo, Sascha Hauer, Matt Mackall, Herbert Xu
  Cc: Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team,
	devicetree, linux-arm-kernel, Arnd Bergmann, Greg Kroah-Hartman,
	Martin Kaiser, Marco Felsch, Franck Lenormand, Iuliana Prodan,
	Silvano Di Ninno, linux-crypto, linux-kernel

i.MX6 SL, SLL, ULL, ULZ SoCs have an RNGB block.

Since imx-rngc driver supports also rngb,
let's enable it for these SoCs too.

Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Reviewed-by: Martin Kaiser <martin@kaiser.cx>
Reviewed-by: Marco Felsch <m.felsch@pengutronix.de>
---
 drivers/char/hw_random/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/char/hw_random/Kconfig b/drivers/char/hw_random/Kconfig
index 8478eb757f3c..98f95a09ce55 100644
--- a/drivers/char/hw_random/Kconfig
+++ b/drivers/char/hw_random/Kconfig
@@ -255,7 +255,7 @@ config HW_RANDOM_MXC_RNGA
 config HW_RANDOM_IMX_RNGC
 	tristate "Freescale i.MX RNGC Random Number Generator"
 	depends on HAS_IOMEM && HAVE_CLK
-	depends on SOC_IMX25 || COMPILE_TEST
+	depends on SOC_IMX25 || SOC_IMX6SL || SOC_IMX6SLL || SOC_IMX6UL || COMPILE_TEST
 	default HW_RANDOM
 	help
 	  This driver provides kernel-side support for the Random Number
-- 
2.17.1


^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH v4 0/5] hwrng: add support for i.MX6 rngb
  2020-07-15 15:25 [PATCH v4 0/5] hwrng: add support for i.MX6 rngb Horia Geantă
                   ` (4 preceding siblings ...)
  2020-07-15 15:26 ` [PATCH v4 5/5] hwrng: imx-rngc: enable driver for i.MX6 Horia Geantă
@ 2020-07-23  7:57 ` Herbert Xu
  2020-08-17  8:07 ` Shawn Guo
  6 siblings, 0 replies; 10+ messages in thread
From: Herbert Xu @ 2020-07-23  7:57 UTC (permalink / raw)
  To: Horia Geantă
  Cc: Rob Herring, Shawn Guo, Sascha Hauer, Matt Mackall,
	Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team,
	devicetree, linux-arm-kernel, Arnd Bergmann, Greg Kroah-Hartman,
	Martin Kaiser, Marco Felsch, Franck Lenormand, Iuliana Prodan,
	Silvano Di Ninno, linux-crypto, linux-kernel

On Wed, Jul 15, 2020 at 06:25:59PM +0300, Horia Geantă wrote:
> Add support for RNGB found in some i.MX6 SoCs (6SL, 6SLL, 6ULL, 6ULZ),
> based on RNGC driver (drivers/char/hw_random/imx-rngc.c).
> 
> This driver claims support also for RNGB (besides RNGC),
> and is currently used only by i.MX25.
> 
> Note:
> 
> Several NXP SoC from QorIQ family (P1010, P1023, P4080, P3041, P5020)
> also have a RNGB, however it's part of the CAAM
> (Cryptograhic Accelerator and Assurance Module) crypto accelerator.
> In this case, RNGB is managed in the caam driver
> (drivers/crypto/caam/), since it's tightly related to
> the caam "job ring" interface, not to mention CAAM internally relying on
> RNGB as source of randomness.
> 
> On the other hand, the i.MX6 SoCs with RNGB have a DCP
> (Data Co-Processor) crypto accelerator and this block and RNGB
> are independent.
> 
> Changelog:
> v4
> -remove unneeded compatible strings from the driver
> v3
> -mention in the DT binding the compatibility with "fsl,imx25-rngb"
> -collected Reviewed-by
> v2
> -update rngb DT binding with compatible strings for i.MX6 SoCs
> 
> Horia Geantă (5):
>   dt-bindings: rng: add RNGB compatibles for i.MX6 SoCs
>   ARM: dts: imx6sl: fix rng node
>   ARM: dts: imx6sll: add rng
>   ARM: dts: imx6ull: add rng
>   hwrng: imx-rngc: enable driver for i.MX6
> 
>  Documentation/devicetree/bindings/rng/imx-rng.txt | 3 +++
>  arch/arm/boot/dts/imx6sl.dtsi                     | 2 ++
>  arch/arm/boot/dts/imx6sll.dtsi                    | 7 +++++++
>  arch/arm/boot/dts/imx6ull.dtsi                    | 7 +++++++
>  drivers/char/hw_random/Kconfig                    | 2 +-
>  5 files changed, 20 insertions(+), 1 deletion(-)

Patches 1 and 5 applied.  Thanks.
-- 
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH v4 0/5] hwrng: add support for i.MX6 rngb
  2020-07-15 15:25 [PATCH v4 0/5] hwrng: add support for i.MX6 rngb Horia Geantă
                   ` (5 preceding siblings ...)
  2020-07-23  7:57 ` [PATCH v4 0/5] hwrng: add support for i.MX6 rngb Herbert Xu
@ 2020-08-17  8:07 ` Shawn Guo
  6 siblings, 0 replies; 10+ messages in thread
From: Shawn Guo @ 2020-08-17  8:07 UTC (permalink / raw)
  To: Horia Geantă
  Cc: Rob Herring, Sascha Hauer, Matt Mackall, Herbert Xu,
	Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team,
	devicetree, linux-arm-kernel, Arnd Bergmann, Greg Kroah-Hartman,
	Martin Kaiser, Marco Felsch, Franck Lenormand, Iuliana Prodan,
	Silvano Di Ninno, linux-crypto, linux-kernel

On Wed, Jul 15, 2020 at 06:25:59PM +0300, Horia Geantă wrote:
> Add support for RNGB found in some i.MX6 SoCs (6SL, 6SLL, 6ULL, 6ULZ),
> based on RNGC driver (drivers/char/hw_random/imx-rngc.c).
> 
> This driver claims support also for RNGB (besides RNGC),
> and is currently used only by i.MX25.
> 
> Note:
> 
> Several NXP SoC from QorIQ family (P1010, P1023, P4080, P3041, P5020)
> also have a RNGB, however it's part of the CAAM
> (Cryptograhic Accelerator and Assurance Module) crypto accelerator.
> In this case, RNGB is managed in the caam driver
> (drivers/crypto/caam/), since it's tightly related to
> the caam "job ring" interface, not to mention CAAM internally relying on
> RNGB as source of randomness.
> 
> On the other hand, the i.MX6 SoCs with RNGB have a DCP
> (Data Co-Processor) crypto accelerator and this block and RNGB
> are independent.
> 
> Changelog:
> v4
> -remove unneeded compatible strings from the driver
> v3
> -mention in the DT binding the compatibility with "fsl,imx25-rngb"
> -collected Reviewed-by
> v2
> -update rngb DT binding with compatible strings for i.MX6 SoCs
> 
> Horia Geantă (5):
...
>   ARM: dts: imx6sl: fix rng node
>   ARM: dts: imx6sll: add rng
>   ARM: dts: imx6ull: add rng

Applied these 3, thanks.

Shawn

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH v4 4/5] ARM: dts: imx6ull: add rng
  2020-07-15 15:26 ` [PATCH v4 4/5] ARM: dts: imx6ull: " Horia Geantă
@ 2021-08-17 15:39   ` Frieder Schrempf
  2021-08-17 17:38     ` Frieder Schrempf
  0 siblings, 1 reply; 10+ messages in thread
From: Frieder Schrempf @ 2021-08-17 15:39 UTC (permalink / raw)
  To: Horia Geantă,
	Rob Herring, Shawn Guo, Sascha Hauer, Matt Mackall, Herbert Xu
  Cc: devicetree, Arnd Bergmann, Iuliana Prodan, Greg Kroah-Hartman,
	Marco Felsch, linux-kernel, Franck Lenormand, NXP Linux Team,
	Pengutronix Kernel Team, Martin Kaiser, Silvano Di Ninno,
	Fabio Estevam, linux-arm-kernel, linux-crypto

Hi,

On 15.07.20 17:26, Horia Geantă wrote:
> Add node for the RNGB block.
> 
> Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
> Reviewed-by: Marco Felsch <m.felsch@pengutronix.de>
> ---
>  arch/arm/boot/dts/imx6ull.dtsi | 7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/imx6ull.dtsi b/arch/arm/boot/dts/imx6ull.dtsi
> index fcde7f77ae42..9bf67490ac49 100644
> --- a/arch/arm/boot/dts/imx6ull.dtsi
> +++ b/arch/arm/boot/dts/imx6ull.dtsi
> @@ -68,6 +68,13 @@
>  				clock-names = "dcp";
>  			};
>  
> +			rngb: rng@2284000 {
> +				compatible = "fsl,imx6ull-rngb", "fsl,imx25-rngb";
> +				reg = <0x02284000 0x4000>;
> +				interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
> +				clocks = <&clks IMX6UL_CLK_DUMMY>;
> +			};
> +

My board (imx6ull-kontron-n6411-s.dts) fails to boot since this was added in v5.10-rc1. There is a crash in the RNG probe. Can anyone help?
Below is the interesting part of the boot log from v5.14-rc6.

Thanks
Frieder


[...]
Asymmetric key parser 'x509' registered
io scheduler mq-deadline registered
io scheduler kyber registered
imx_soc_device_init: failed to find fsl,imx6ul-ocotp regmap!
2020000.serial: ttymxc0 at MMIO 0x2020000 (irq = 30, base_baud = 5000000) is a IMX
21e8000.serial: ttymxc1 at MMIO 0x21e8000 (irq = 69, base_baud = 5000000) is a IMX
21ec000.serial: ttymxc2 at MMIO 0x21ec000 (irq = 70, base_baud = 5000000) is a IMX
21f0000.serial: ttymxc3 at MMIO 0x21f0000 (irq = 71, base_baud = 5000000) is a IMX
imx-uart 21f0000.serial: Console IMX rounded baud rate from 114943 to 114900
printk: console [ttymxc3] enabled
8<--- cut here ---
Unhandled fault: external abort on non-linefetch (0x008) at 0xe08d8000
pgd = (ptrval)
[e08d8000] *pgd=81c89811, *pte=02284653, *ppte=02284453
Internal error: : 8 [#1] SMP ARM
Modules linked in:
CPU: 0 PID: 1 Comm: swapper/0 Not tainted 5.14.0-rc6-ktn+g807a88195d76 #1
Hardware name: Freescale i.MX6 Ultralite (Device Tree)
PC is at imx_rngc_probe+0xa4/0x30c
LR is at _raw_spin_unlock_irqrestore+0x4c/0x50
pc : [<c06922b4>]    lr : [<c0c7ccd4>]    psr: 60000053
sp : c1ccfe00  ip : 00000001  fp : 00000000
r10: c1cb6240  r9 : c1fdeb40  r8 : 00000000
r7 : c1d98410  r6 : c1d98400  r5 : c1e07b40  r4 : 0000004c
r3 : e08d8000  r2 : 00000000  r1 : e591bac3  r0 : 00000000
Flags: nZCv  IRQs on  FIQs off  Mode SVC_32  ISA ARM  Segment none
Control: 10c5387d  Table: 8000406a  DAC: 00000051
Register r0 information: NULL pointer
Register r1 information: non-paged memory
Register r2 information: NULL pointer
Register r3 information: 0-page vmalloc region starting at 0xe08d8000 allocated at __devm_ioremap+0xa4/0xbc
Register r4 information: non-paged memory
Register r5 information: slab kmalloc-256 start c1e07b00 pointer offset 64 size 256
Register r6 information: slab kmalloc-1k start c1d98400 pointer offset 0 size 1024
Register r7 information: slab kmalloc-1k start c1d98400 pointer offset 16 size 1024
Register r8 information: NULL pointer
Register r9 information: slab kmalloc-64 start c1fdeb40 pointer offset 0 size 64
Register r10 information: slab kmalloc-192 start c1cb6240 pointer offset 0 size 192
Register r11 information: NULL pointer
Register r12 information: non-paged memory
Process swapper/0 (pid: 1, stack limit = 0x(ptrval))
Stack: (0xc1ccfe00 to 0xc1cd0000)
fe00: 00000000 00000000 00000000 9cd54eeb 00000000 c1d98410 c145a4d4 00000000
fe20: c1d98410 c1244854 c1cb6240 c0710fb4 c1d98410 00000000 c145a4d4 00000000
fe40: c1d98410 c070e86c c1d98410 c145a4d4 c145a4d4 c070eadc c1b3b0fc c1b3b100
fe60: c145a4d4 c070eb70 00000000 c1d98410 c145a4d4 c1cce000 00000000 c070ef24
fe80: 00000000 c145a4d4 c070eeb4 c070cb9c c1fdd900 c1cb32b0 c1de0a14 9cd54eeb
fea0: c1cb32e4 c145a4d4 c1fdd900 00000000 c145cdf0 c070db70 c1024488 c122e530
fec0: c145a4d4 c145a4d4 c122e530 c145a4d4 c1308fcc c070fc7c c145a4c0 c122e530
fee0: c145a4d4 c0711470 c1cce000 c122e530 c14c6b80 c0102220 00000000 00000000
ff00: c1cb62e1 c1106d00 000000fc c014cd08 000000a2 c11059b8 c1051d10 c12003e8
ff20: c1cce000 c14c6b80 c1308fcc c11059b8 c14d1000 c1244854 000000fc c01aa110
ff40: 00000000 9cd54eeb c1254540 00000007 c1244874 c11059b8 c14d1000 c1244854
ff60: c1cb6240 c1201200 00000006 00000006 00000000 c12003e8 00000000 000000fc
ff80: 00000000 00000000 c0c71b20 00000000 00000000 00000000 00000000 00000000
ffa0: 00000000 c0c71b30 00000000 c010013c 00000000 00000000 00000000 00000000
ffc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
ffe0: 00000000 00000000 00000000 00000000 00000013 00000000 00000000 00000000
[<c06922b4>] (imx_rngc_probe) from [<c0710fb4>] (platform_probe+0x58/0xb8)
[<c0710fb4>] (platform_probe) from [<c070e86c>] (really_probe+0x14c/0x33c)
[<c070e86c>] (really_probe) from [<c070eadc>] (__driver_probe_device+0x80/0xe4)
[<c070eadc>] (__driver_probe_device) from [<c070eb70>] (driver_probe_device+0x30/0xd4)
[<c070eb70>] (driver_probe_device) from [<c070ef24>] (__driver_attach+0x70/0xf4)
[<c070ef24>] (__driver_attach) from [<c070cb9c>] (bus_for_each_dev+0x78/0xb8)
[<c070cb9c>] (bus_for_each_dev) from [<c070db70>] (bus_add_driver+0x150/0x1dc)
[<c070db70>] (bus_add_driver) from [<c070fc7c>] (driver_register+0x74/0x108)
[<c070fc7c>] (driver_register) from [<c0711470>] (__platform_driver_probe+0x44/0xdc)
[<c0711470>] (__platform_driver_probe) from [<c0102220>] (do_one_initcall+0x80/0x3a8)
[<c0102220>] (do_one_initcall) from [<c1201200>] (kernel_init_freeable+0x1a0/0x234)
[<c1201200>] (kernel_init_freeable) from [<c0c71b30>] (kernel_init+0x10/0x124)
[<c0c71b30>] (kernel_init) from [<c010013c>] (ret_from_fork+0x14/0x38)
Exception stack(0xc1ccffb0 to 0xc1ccfff8)
ffa0:                                     00000000 00000000 00000000 00000000
ffc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
ffe0: 00000000 00000000 00000000 00000000 00000013 00000000
Code: ebfe93da e2508000 1a00000f e5953008 (e5939000)
---[ end trace 27e536094eba35b6 ]---
Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b
---[ end Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b ]---





^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH v4 4/5] ARM: dts: imx6ull: add rng
  2021-08-17 15:39   ` Frieder Schrempf
@ 2021-08-17 17:38     ` Frieder Schrempf
  0 siblings, 0 replies; 10+ messages in thread
From: Frieder Schrempf @ 2021-08-17 17:38 UTC (permalink / raw)
  To: Horia Geantă,
	Rob Herring, Shawn Guo, Sascha Hauer, Matt Mackall, Herbert Xu
  Cc: devicetree, Arnd Bergmann, Iuliana Prodan, Greg Kroah-Hartman,
	Marco Felsch, linux-kernel, Franck Lenormand, NXP Linux Team,
	Pengutronix Kernel Team, Martin Kaiser, Silvano Di Ninno,
	Fabio Estevam, linux-arm-kernel, linux-crypto

On 17.08.21 17:39, Frieder Schrempf wrote:
> Hi,
> 
> On 15.07.20 17:26, Horia Geantă wrote:
>> Add node for the RNGB block.
>>
>> Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
>> Reviewed-by: Marco Felsch <m.felsch@pengutronix.de>
>> ---
>>  arch/arm/boot/dts/imx6ull.dtsi | 7 +++++++
>>  1 file changed, 7 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/imx6ull.dtsi b/arch/arm/boot/dts/imx6ull.dtsi
>> index fcde7f77ae42..9bf67490ac49 100644
>> --- a/arch/arm/boot/dts/imx6ull.dtsi
>> +++ b/arch/arm/boot/dts/imx6ull.dtsi
>> @@ -68,6 +68,13 @@
>>  				clock-names = "dcp";
>>  			};
>>  
>> +			rngb: rng@2284000 {
>> +				compatible = "fsl,imx6ull-rngb", "fsl,imx25-rngb";
>> +				reg = <0x02284000 0x4000>;
>> +				interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
>> +				clocks = <&clks IMX6UL_CLK_DUMMY>;
>> +			};
>> +
> 
> My board (imx6ull-kontron-n6411-s.dts) fails to boot since this was added in v5.10-rc1. There is a crash in the RNG probe. Can anyone help?
> Below is the interesting part of the boot log from v5.14-rc6.

I just found out, that I was trying to boot on an i.MX6UL when I was assuming the board had an i.MX6ULL. That won't work of course. Sorry for the noise!

^ permalink raw reply	[flat|nested] 10+ messages in thread

end of thread, other threads:[~2021-08-17 17:38 UTC | newest]

Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-07-15 15:25 [PATCH v4 0/5] hwrng: add support for i.MX6 rngb Horia Geantă
2020-07-15 15:26 ` [PATCH v4 1/5] dt-bindings: rng: add RNGB compatibles for i.MX6 SoCs Horia Geantă
2020-07-15 15:26 ` [PATCH v4 2/5] ARM: dts: imx6sl: fix rng node Horia Geantă
2020-07-15 15:26 ` [PATCH v4 3/5] ARM: dts: imx6sll: add rng Horia Geantă
2020-07-15 15:26 ` [PATCH v4 4/5] ARM: dts: imx6ull: " Horia Geantă
2021-08-17 15:39   ` Frieder Schrempf
2021-08-17 17:38     ` Frieder Schrempf
2020-07-15 15:26 ` [PATCH v4 5/5] hwrng: imx-rngc: enable driver for i.MX6 Horia Geantă
2020-07-23  7:57 ` [PATCH v4 0/5] hwrng: add support for i.MX6 rngb Herbert Xu
2020-08-17  8:07 ` Shawn Guo

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