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From: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
To: "Mark Brown" <broonie@kernel.org>,
	"Michal Simek" <michal.simek@xilinx.com>,
	"Sören Brinkmann" <soren.brinkmann@xilinx.com>,
	linux-spi@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Cc: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Subject: [PATCH 10/18] spi/xilinx: Support for spi mode CS_HIGH
Date: Fri, 23 Jan 2015 17:08:42 +0100	[thread overview]
Message-ID: <1422029330-10971-11-git-send-email-ricardo.ribalda@gmail.com> (raw)
In-Reply-To: <1422029330-10971-1-git-send-email-ricardo.ribalda@gmail.com>

The core controls the chip select lines individually.

By default, all the lines are consider active_low. After
spi_setup_transfer, it has its real value.

Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
---
 drivers/spi/spi-xilinx.c | 62 +++++++++++++++++++++++++++++-------------------
 1 file changed, 38 insertions(+), 24 deletions(-)

diff --git a/drivers/spi/spi-xilinx.c b/drivers/spi/spi-xilinx.c
index a70cb91..29edf1b 100644
--- a/drivers/spi/spi-xilinx.c
+++ b/drivers/spi/spi-xilinx.c
@@ -89,6 +89,7 @@ struct xilinx_spi {
 	int remaining_bytes;	/* the number of bytes left to transfer */
 	u8 bits_per_word;
 	int buffer_size;	/* buffer size in words */
+	u32 cs_inactive;	/* Level of the CS pins when inactive*/
 	unsigned int (*read_fn)(void __iomem *);
 	void (*write_fn)(u32, void __iomem *);
 	void (*tx_fn)(struct xilinx_spi *);
@@ -194,33 +195,37 @@ static void xspi_init_hw(struct xilinx_spi *xspi)
 static void xilinx_spi_chipselect(struct spi_device *spi, int is_on)
 {
 	struct xilinx_spi *xspi = spi_master_get_devdata(spi->master);
+	u16 cr;
+	u32 cs;
 
 	if (is_on == BITBANG_CS_INACTIVE) {
 		/* Deselect the slave on the SPI bus */
-		xspi->write_fn(0xffff, xspi->regs + XSPI_SSR_OFFSET);
-	} else if (is_on == BITBANG_CS_ACTIVE) {
-		/* Set the SPI clock phase and polarity */
-		u16 cr = xspi->read_fn(xspi->regs + XSPI_CR_OFFSET)
-			 & ~XSPI_CR_MODE_MASK;
-		if (spi->mode & SPI_CPHA)
-			cr |= XSPI_CR_CPHA;
-		if (spi->mode & SPI_CPOL)
-			cr |= XSPI_CR_CPOL;
-		if (spi->mode & SPI_LSB_FIRST)
-			cr |= XSPI_CR_LSB_FIRST;
-		if (spi->mode & SPI_LOOP)
-			cr |= XSPI_CR_LOOP;
-		xspi->write_fn(cr, xspi->regs + XSPI_CR_OFFSET);
-
-		/* We do not check spi->max_speed_hz here as the SPI clock
-		 * frequency is not software programmable (the IP block design
-		 * parameter)
-		 */
-
-		/* Activate the chip select */
-		xspi->write_fn(~(0x0001 << spi->chip_select),
-			xspi->regs + XSPI_SSR_OFFSET);
+		xspi->write_fn(xspi->cs_inactive, xspi->regs + XSPI_SSR_OFFSET);
+		return;
 	}
+
+	/* Set the SPI clock phase and polarity */
+	cr = xspi->read_fn(xspi->regs + XSPI_CR_OFFSET)	& ~XSPI_CR_MODE_MASK;
+	if (spi->mode & SPI_CPHA)
+		cr |= XSPI_CR_CPHA;
+	if (spi->mode & SPI_CPOL)
+		cr |= XSPI_CR_CPOL;
+	if (spi->mode & SPI_LSB_FIRST)
+		cr |= XSPI_CR_LSB_FIRST;
+	if (spi->mode & SPI_LOOP)
+		cr |= XSPI_CR_LOOP;
+	xspi->write_fn(cr, xspi->regs + XSPI_CR_OFFSET);
+
+	/* We do not check spi->max_speed_hz here as the SPI clock
+	 * frequency is not software programmable (the IP block design
+	 * parameter)
+	 */
+
+	cs = xspi->cs_inactive;
+	cs ^= BIT(spi->chip_select);
+
+	/* Activate the chip select */
+	xspi->write_fn(cs, xspi->regs + XSPI_SSR_OFFSET);
 }
 
 /* spi_bitbang requires custom setup_transfer() to be defined if there is a
@@ -229,6 +234,13 @@ static void xilinx_spi_chipselect(struct spi_device *spi, int is_on)
 static int xilinx_spi_setup_transfer(struct spi_device *spi,
 		struct spi_transfer *t)
 {
+	struct xilinx_spi *xspi = spi_master_get_devdata(spi->master);
+
+	if (spi->mode & SPI_CS_HIGH)
+		xspi->cs_inactive &= ~BIT(spi->chip_select);
+	else
+		xspi->cs_inactive |= BIT(spi->chip_select);
+
 	return 0;
 }
 
@@ -369,9 +381,11 @@ static int xilinx_spi_probe(struct platform_device *pdev)
 		return -ENODEV;
 
 	/* the spi->mode bits understood by this driver: */
-	master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST | SPI_LOOP;
+	master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST | SPI_LOOP |
+			    SPI_CS_HIGH;
 
 	xspi = spi_master_get_devdata(master);
+	xspi->cs_inactive = 0xffffffff;
 	xspi->bitbang.master = master;
 	xspi->bitbang.chipselect = xilinx_spi_chipselect;
 	xspi->bitbang.setup_transfer = xilinx_spi_setup_transfer;
-- 
2.1.4


  parent reply	other threads:[~2015-01-23 16:09 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-01-23 16:08 [PATCH 00/18] spi/xilinx: Speed-up Ricardo Ribalda Delgado
2015-01-23 16:08 ` [PATCH 01/18] spi/xilinx: Support for spi mode LSB_FIRST Ricardo Ribalda Delgado
2015-01-26 19:23   ` Mark Brown
2015-01-23 16:08 ` [PATCH 02/18] spi/xilinx: Support for spi mode LOOP Ricardo Ribalda Delgado
2015-01-26 19:23   ` Mark Brown
2015-01-23 16:08 ` [PATCH 03/18] spi/xilinx: Simplify data read from the Rx FIFO Ricardo Ribalda Delgado
2015-01-27 17:25   ` Mark Brown
2015-01-23 16:08 ` [PATCH 04/18] spi-xilinx: Simplify spi_fill_tx_fifo Ricardo Ribalda Delgado
2015-01-26 23:54   ` Mark Brown
2015-01-23 16:08 ` [PATCH 05/18] spi/xilinx: Leave the IRQ always enabled Ricardo Ribalda Delgado
2015-01-23 16:08 ` [PATCH 06/18] spi/xilinx: Code cleanup Ricardo Ribalda Delgado
2015-01-27  0:05   ` Mark Brown
2015-01-23 16:08 ` [PATCH 07/18] spi/xilinx: Use cached value of register Ricardo Ribalda Delgado
2015-01-23 16:08 ` [PATCH 08/18] spi/xilinx: Support cores with no interrupt Ricardo Ribalda Delgado
2015-01-27  0:04   ` Mark Brown
2015-01-27 19:05     ` Ricardo Ribalda Delgado
2015-01-27 19:49       ` Mark Brown
2015-01-27 19:56         ` Ricardo Ribalda Delgado
2015-01-23 16:08 ` [PATCH 09/18] spi/xilinx: Do not inhibit transmission in polling mode Ricardo Ribalda Delgado
2015-01-23 16:08 ` Ricardo Ribalda Delgado [this message]
2015-01-23 16:08 ` [PATCH 11/18] spi/xilinx: Remove rx_fn and tx_fn pointer Ricardo Ribalda Delgado
2015-01-27  0:09   ` Mark Brown
2015-01-27 10:00     ` Ricardo Ribalda Delgado
2015-01-27 15:42       ` Joe Perches
2015-01-27 19:07         ` Ricardo Ribalda Delgado
2015-01-23 16:08 ` [PATCH 12/18] spi/xilinx: Make spi_tx and spi_rx simmetric Ricardo Ribalda Delgado
2015-01-23 16:08 ` [PATCH 13/18] spi/xilinx: Convert remainding_bytes in remaining words Ricardo Ribalda Delgado
2015-01-23 16:08 ` [PATCH 14/18] spi/xilinx: Convert bits_per_word in bytes_per_word Ricardo Ribalda Delgado
2015-01-23 16:08 ` [PATCH 15/18] spi/xilinx: Remove iowrite/ioread wrappers Ricardo Ribalda Delgado
2015-01-23 16:08 ` [PATCH 16/18] spi/xilinx: Reset core before buffer_size detection Ricardo Ribalda Delgado
2015-01-27  0:11   ` Mark Brown
2015-01-23 16:08 ` [PATCH 17/18] spi/xilinx: Remove remaining_words driver data variable Ricardo Ribalda Delgado
2015-01-23 16:08 ` [PATCH 18/18] spi/xilinx: Check number of slaves range Ricardo Ribalda Delgado
2015-01-27  0:14 ` [PATCH 00/18] spi/xilinx: Speed-up Mark Brown
2015-01-27 10:17   ` Ricardo Ribalda Delgado
2015-01-27 11:59     ` Mark Brown

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