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From: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
To: "Mark Brown" <broonie@kernel.org>,
"Michal Simek" <michal.simek@xilinx.com>,
"Sören Brinkmann" <soren.brinkmann@xilinx.com>,
linux-spi@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Cc: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Subject: [PATCH 07/18] spi/xilinx: Use cached value of register
Date: Fri, 23 Jan 2015 17:08:39 +0100 [thread overview]
Message-ID: <1422029330-10971-8-git-send-email-ricardo.ribalda@gmail.com> (raw)
In-Reply-To: <1422029330-10971-1-git-send-email-ricardo.ribalda@gmail.com>
The control register has not changed since the previous access.
Therefore we can use the cached value and safe one bus access.
Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
---
drivers/spi/spi-xilinx.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/spi/spi-xilinx.c b/drivers/spi/spi-xilinx.c
index 978fbdd..3f8450d 100644
--- a/drivers/spi/spi-xilinx.c
+++ b/drivers/spi/spi-xilinx.c
@@ -271,7 +271,6 @@ static int xilinx_spi_txrx_bufs(struct spi_device *spi, struct spi_transfer *t)
* transmitter while the Isr refills the transmit register/FIFO,
* or make sure it is stopped if we're done.
*/
- cr = xspi->read_fn(xspi->regs + XSPI_CR_OFFSET);
xspi->write_fn(cr | XSPI_CR_TRANS_INHIBIT,
xspi->regs + XSPI_CR_OFFSET);
--
2.1.4
next prev parent reply other threads:[~2015-01-23 16:14 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-01-23 16:08 [PATCH 00/18] spi/xilinx: Speed-up Ricardo Ribalda Delgado
2015-01-23 16:08 ` [PATCH 01/18] spi/xilinx: Support for spi mode LSB_FIRST Ricardo Ribalda Delgado
2015-01-26 19:23 ` Mark Brown
2015-01-23 16:08 ` [PATCH 02/18] spi/xilinx: Support for spi mode LOOP Ricardo Ribalda Delgado
2015-01-26 19:23 ` Mark Brown
2015-01-23 16:08 ` [PATCH 03/18] spi/xilinx: Simplify data read from the Rx FIFO Ricardo Ribalda Delgado
2015-01-27 17:25 ` Mark Brown
2015-01-23 16:08 ` [PATCH 04/18] spi-xilinx: Simplify spi_fill_tx_fifo Ricardo Ribalda Delgado
2015-01-26 23:54 ` Mark Brown
2015-01-23 16:08 ` [PATCH 05/18] spi/xilinx: Leave the IRQ always enabled Ricardo Ribalda Delgado
2015-01-23 16:08 ` [PATCH 06/18] spi/xilinx: Code cleanup Ricardo Ribalda Delgado
2015-01-27 0:05 ` Mark Brown
2015-01-23 16:08 ` Ricardo Ribalda Delgado [this message]
2015-01-23 16:08 ` [PATCH 08/18] spi/xilinx: Support cores with no interrupt Ricardo Ribalda Delgado
2015-01-27 0:04 ` Mark Brown
2015-01-27 19:05 ` Ricardo Ribalda Delgado
2015-01-27 19:49 ` Mark Brown
2015-01-27 19:56 ` Ricardo Ribalda Delgado
2015-01-23 16:08 ` [PATCH 09/18] spi/xilinx: Do not inhibit transmission in polling mode Ricardo Ribalda Delgado
2015-01-23 16:08 ` [PATCH 10/18] spi/xilinx: Support for spi mode CS_HIGH Ricardo Ribalda Delgado
2015-01-23 16:08 ` [PATCH 11/18] spi/xilinx: Remove rx_fn and tx_fn pointer Ricardo Ribalda Delgado
2015-01-27 0:09 ` Mark Brown
2015-01-27 10:00 ` Ricardo Ribalda Delgado
2015-01-27 15:42 ` Joe Perches
2015-01-27 19:07 ` Ricardo Ribalda Delgado
2015-01-23 16:08 ` [PATCH 12/18] spi/xilinx: Make spi_tx and spi_rx simmetric Ricardo Ribalda Delgado
2015-01-23 16:08 ` [PATCH 13/18] spi/xilinx: Convert remainding_bytes in remaining words Ricardo Ribalda Delgado
2015-01-23 16:08 ` [PATCH 14/18] spi/xilinx: Convert bits_per_word in bytes_per_word Ricardo Ribalda Delgado
2015-01-23 16:08 ` [PATCH 15/18] spi/xilinx: Remove iowrite/ioread wrappers Ricardo Ribalda Delgado
2015-01-23 16:08 ` [PATCH 16/18] spi/xilinx: Reset core before buffer_size detection Ricardo Ribalda Delgado
2015-01-27 0:11 ` Mark Brown
2015-01-23 16:08 ` [PATCH 17/18] spi/xilinx: Remove remaining_words driver data variable Ricardo Ribalda Delgado
2015-01-23 16:08 ` [PATCH 18/18] spi/xilinx: Check number of slaves range Ricardo Ribalda Delgado
2015-01-27 0:14 ` [PATCH 00/18] spi/xilinx: Speed-up Mark Brown
2015-01-27 10:17 ` Ricardo Ribalda Delgado
2015-01-27 11:59 ` Mark Brown
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