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From: Stephen Boyd <sboyd@kernel.org>
To: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>,
afaerber@suse.de, mark.rutland@arm.com, mturquette@baylibre.com,
robh+dt@kernel.org
Cc: liuwei@actions-semi.com, mp-cs@actions-semi.com,
96boards@ucrobotics.com, devicetree@vger.kernel.org,
davem@davemloft.net, mchehab@kernel.org,
daniel.thompson@linaro.org, amit.kucheria@linaro.org,
viresh.kumar@linaro.org, hzhang@ucrobotics.com,
bdong@ucrobotics.com, linux-kernel@vger.kernel.org,
linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
manivannanece23@gmail.com,
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Subject: Re: [PATCH v5 04/12] clk: actions: Add common clock driver support
Date: Mon, 19 Mar 2018 18:02:23 -0700 [thread overview]
Message-ID: <152150774389.254778.79582051178250322@swboyd.mtv.corp.google.com> (raw)
In-Reply-To: <20180317100952.28538-5-manivannan.sadhasivam@linaro.org>
Quoting Manivannan Sadhasivam (2018-03-17 03:09:44)
> diff --git a/drivers/clk/actions/owl-common.c b/drivers/clk/actions/owl-common.c
> new file mode 100644
> index 000000000000..a7cb698fdc86
> --- /dev/null
> +++ b/drivers/clk/actions/owl-common.c
> @@ -0,0 +1,84 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +//
> +// OWL common clock driver
> +//
> +// Copyright (c) 2014 Actions Semi Inc.
> +// Author: David Liu <liuwei@actions-semi.com>
> +//
> +// Copyright (c) 2018 Linaro Ltd.
> +// Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> +
> +#include <linux/of_address.h>
> +#include <linux/of_platform.h>
> +#include <linux/regmap.h>
> +
> +#include "owl-common.h"
> +
> +static const struct regmap_config owl_regmap_config = {
> + .reg_bits = 32,
> + .reg_stride = 4,
> + .val_bits = 32,
> + .max_register = 0xffff,
Is that actually the end?
> + .fast_io = true,
> +};
> +
> +static void owl_clk_set_regmap(const struct owl_clk_desc *desc,
> + struct regmap *regmap)
> +{
> + int i;
> + struct owl_clk_common *clks;
> +
> + for (i = 0; i < desc->num_clks; i++) {
> + clks = desc->clks[i];
> + if (!clks)
> + continue;
> +
> + clks->regmap = regmap;
> + }
> +}
> +
> +int owl_clk_regmap_init(struct platform_device *pdev,
> + const struct owl_clk_desc *desc)
> +{
> + void __iomem *base;
> + struct device_node *node = pdev->dev.of_node;
> + struct regmap *regmap;
> +
> + base = of_iomap(node, 0);
Please use platform device apis to find and map the ioresources.
> + regmap = devm_regmap_init_mmio(&pdev->dev, base, &owl_regmap_config);
> + if (IS_ERR_OR_NULL(regmap)) {
Isn't it just IS_ERR() for regmap errors?
> + pr_err("failed to init regmap\n");
> + return PTR_ERR(regmap);
> + }
> +
> + owl_clk_set_regmap(desc, regmap);
> +
> + return 0;
> +}
> +
> +int owl_clk_probe(struct device *dev, struct clk_hw_onecell_data *hw_clks)
> +{
> + int i, ret;
> + struct clk_hw *hw;
> +
> + for (i = 0; i < hw_clks->num; i++) {
> +
> + hw = hw_clks->hws[i];
> +
> + if (!hw)
Style: Stick that if to the assignment before.
> + continue;
> +
> + ret = devm_clk_hw_register(dev, hw);
> + if (ret) {
> + dev_err(dev, "Couldn't register clock %d - %s\n",
> + i, hw->init->name);
> + return ret;
> + }
> + }
> +
> + ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get, hw_clks);
> + if (ret)
> + dev_err(dev, "Failed to add clock provider\n");
> +
> + return ret;
> +}
next prev parent reply other threads:[~2018-03-20 1:02 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-03-17 10:09 [PATCH v5 00/12] Add clock driver for Actions S900 SoC Manivannan Sadhasivam
2018-03-17 10:09 ` [PATCH v5 01/12] dt-bindings: clock: Add Actions S900 clock bindings Manivannan Sadhasivam
2018-03-20 0:59 ` Stephen Boyd
2018-03-17 10:09 ` [PATCH v5 02/12] arm64: dts: actions: Add S900 clock management unit nodes Manivannan Sadhasivam
2018-03-17 10:09 ` [PATCH v5 03/12] arm64: dts: actions: Source CMU clock for UART5 Manivannan Sadhasivam
2018-03-17 10:09 ` [PATCH v5 04/12] clk: actions: Add common clock driver support Manivannan Sadhasivam
2018-03-20 1:02 ` Stephen Boyd [this message]
2018-03-17 10:09 ` [PATCH v5 05/12] clk: actions: Add gate clock support Manivannan Sadhasivam
2018-03-20 1:04 ` Stephen Boyd
2018-03-17 10:09 ` [PATCH v5 06/12] clk: actions: Add mux " Manivannan Sadhasivam
2018-03-20 1:05 ` Stephen Boyd
2018-03-17 10:09 ` [PATCH v5 07/12] clk: actions: Add divider " Manivannan Sadhasivam
2018-03-20 1:06 ` Stephen Boyd
2018-03-17 10:09 ` [PATCH v5 08/12] clk: actions: Add factor " Manivannan Sadhasivam
2018-03-18 20:31 ` kbuild test robot
2018-03-20 1:08 ` Stephen Boyd
2018-03-20 1:11 ` Stephen Boyd
2018-03-20 1:41 ` kbuild test robot
2018-03-17 10:09 ` [PATCH v5 09/12] clk: actions: Add fixed " Manivannan Sadhasivam
2018-03-20 1:10 ` Stephen Boyd
2018-03-20 9:04 ` Manivannan Sadhasivam
2018-03-20 17:15 ` Stephen Boyd
2018-03-17 10:09 ` [PATCH v5 10/12] clk: actions: Add composite " Manivannan Sadhasivam
2018-03-17 10:09 ` [PATCH v5 11/12] clk: actions: Add pll " Manivannan Sadhasivam
2018-03-17 10:09 ` [PATCH v5 12/12] clk: actions: Add S900 SoC " Manivannan Sadhasivam
2018-03-18 20:38 ` kbuild test robot
2018-03-18 21:28 ` kbuild test robot
2018-03-20 7:16 ` Stephen Boyd
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