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From: Amelie Delaunay <amelie.delaunay@st.com>
To: Alessandro Zummo <a.zummo@towertech.it>,
	Alexandre Belloni <alexandre.belloni@free-electrons.com>,
	Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Maxime Coquelin <mcoquelin.stm32@gmail.com>,
	Alexandre Torgue <alexandre.torgue@st.com>
Cc: <linux-rtc@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>,
	Amelie Delaunay <amelie.delaunay@st.com>
Subject: [PATCH 3/4] dt-bindings: rtc: update stm32-rtc documentation for st,syscfg property
Date: Thu, 19 Apr 2018 15:21:42 +0200	[thread overview]
Message-ID: <1524144103-21432-4-git-send-email-amelie.delaunay@st.com> (raw)
In-Reply-To: <1524144103-21432-1-git-send-email-amelie.delaunay@st.com>

RTC driver should not be aware of the PWR registers offset and bits
position. Furthermore, we can imagine that Disable Backup Protection (DBP)
relative register and bit mask could change depending on the SoC. So this
patch moves st,syscfg property from single pwrcfg phandle to pwrcfg
phandle/offset/mask triplet.

Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
---
 Documentation/devicetree/bindings/rtc/st,stm32-rtc.txt | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/Documentation/devicetree/bindings/rtc/st,stm32-rtc.txt b/Documentation/devicetree/bindings/rtc/st,stm32-rtc.txt
index a66692a..00f8b5d 100644
--- a/Documentation/devicetree/bindings/rtc/st,stm32-rtc.txt
+++ b/Documentation/devicetree/bindings/rtc/st,stm32-rtc.txt
@@ -14,8 +14,10 @@ Required properties:
     It is required only on stm32h7.
 - interrupt-parent: phandle for the interrupt controller.
 - interrupts: rtc alarm interrupt.
-- st,syscfg: phandle for pwrcfg, mandatory to disable/enable backup domain
-  (RTC registers) write protection.
+- st,syscfg: phandle/offset/mask triplet. The phandle to pwrcfg used to
+  access control register at offset, and change the dbp (Disable Backup
+  Protection) bit represented by the mask, mandatory to disable/enable backup
+  domain (RTC registers) write protection.
 
 Optional properties (to override default rtc_ck parent clock):
 - assigned-clocks: reference to the rtc_ck clock entry.
@@ -31,7 +33,7 @@ Example:
 		assigned-clock-parents = <&rcc 1 CLK_LSE>;
 		interrupt-parent = <&exti>;
 		interrupts = <17 1>;
-		st,syscfg = <&pwrcfg>;
+		st,syscfg = <&pwrcfg 0x00 0x100>;
 	};
 
 	rtc: rtc@58004000 {
@@ -44,5 +46,5 @@ Example:
 		interrupt-parent = <&exti>;
 		interrupts = <17 1>;
 		interrupt-names = "alarm";
-		st,syscfg = <&pwrcfg>;
+		st,syscfg = <&pwrcfg 0x00 0x100>;
 	};
-- 
2.7.4

  parent reply	other threads:[~2018-04-19 13:22 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-04-19 13:21 [PATCH 0/4] Various fixes on STM32 RTC Amelie Delaunay
2018-04-19 13:21 ` [PATCH 1/4] rtc: stm32: fix copyright and adopt SPDX identifier Amelie Delaunay
2018-04-19 13:21 ` [PATCH 2/4] rtc: stm32: fix alarm interrupt flags by removing IRQF_TRIGGER_RISING Amelie Delaunay
2018-04-19 13:21 ` Amelie Delaunay [this message]
2018-04-27  2:58   ` [PATCH 3/4] dt-bindings: rtc: update stm32-rtc documentation for st,syscfg property Rob Herring
2018-05-03 20:53     ` Alexandre Belloni
2018-05-04  7:40       ` Alexandre Torgue
2018-05-09  7:21         ` Amelie DELAUNAY
2018-04-19 13:21 ` [PATCH 4/4] rtc: stm32: get DBP register and mask from DT " Amelie Delaunay
2018-04-19 13:43 ` [PATCH 0/4] Various fixes on STM32 RTC Alexandre Belloni
2018-04-19 14:14   ` Amelie DELAUNAY
2018-05-06 20:27 ` Alexandre Belloni

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