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From: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
To: linux-kernel@vger.kernel.org, x86@kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, hpa@zytor.com, bp@suse.de,
	Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>,
	Janakarajan Natarajan <Janakarajan.Natarajan@amd.com>
Subject: [PATCH v2 2/4] perf/x86/amd/uncore: Fix amd_uncore_llc ID to use pre-defined cpu_llc_id
Date: Fri, 27 Apr 2018 16:34:35 -0500	[thread overview]
Message-ID: <1524864877-111962-3-git-send-email-suravee.suthikulpanit@amd.com> (raw)
In-Reply-To: <1524864877-111962-1-git-send-email-suravee.suthikulpanit@amd.com>

Current logic iterates over CPUID Fn8000001d leafs (Cache Properties)
to detect the last level cache, and derive the last-level cache ID.
However, this information is already available in the cpu_llc_id.
Therefore, make use of it instead.

Reviewed-by: Borislav Petkov <bp@suse.de>
Cc: Janakarajan Natarajan <Janakarajan.Natarajan@amd.com>
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
---
 arch/x86/events/amd/uncore.c | 21 ++-------------------
 1 file changed, 2 insertions(+), 19 deletions(-)

diff --git a/arch/x86/events/amd/uncore.c b/arch/x86/events/amd/uncore.c
index f5cbbba..981ba5e 100644
--- a/arch/x86/events/amd/uncore.c
+++ b/arch/x86/events/amd/uncore.c
@@ -19,6 +19,7 @@
 #include <asm/cpufeature.h>
 #include <asm/perf_event.h>
 #include <asm/msr.h>
+#include <asm/smp.h>
 
 #define NUM_COUNTERS_NB		4
 #define NUM_COUNTERS_L2		4
@@ -399,26 +400,8 @@ static int amd_uncore_cpu_starting(unsigned int cpu)
 	}
 
 	if (amd_uncore_llc) {
-		unsigned int apicid = cpu_data(cpu).apicid;
-		unsigned int nshared, subleaf, prev_eax = 0;
-
 		uncore = *per_cpu_ptr(amd_uncore_llc, cpu);
-		/*
-		 * Iterate over Cache Topology Definition leaves until no
-		 * more cache descriptions are available.
-		 */
-		for (subleaf = 0; subleaf < 5; subleaf++) {
-			cpuid_count(0x8000001d, subleaf, &eax, &ebx, &ecx, &edx);
-
-			/* EAX[0:4] gives type of cache */
-			if (!(eax & 0x1f))
-				break;
-
-			prev_eax = eax;
-		}
-		nshared = ((prev_eax >> 14) & 0xfff) + 1;
-
-		uncore->id = apicid - (apicid % nshared);
+		uncore->id = per_cpu(cpu_llc_id, cpu);
 
 		uncore = amd_uncore_find_online_sibling(uncore, amd_uncore_llc);
 		*per_cpu_ptr(amd_uncore_llc, cpu) = uncore;
-- 
2.7.4

  parent reply	other threads:[~2018-04-27 21:35 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-04-27 21:34 [PATCH v2 0/4] x86/CPU: Update AMD Last-Level-Cache Information Suravee Suthikulpanit
2018-04-27 21:34 ` [PATCH v2 1/4] x86/CPU/AMD: Remove unnecessary check for CONFIG_SMP Suravee Suthikulpanit
2018-05-12 21:09   ` [tip:x86/cpu] x86/CPU/AMD: Have smp_num_siblings and cpu_llc_id always be present tip-bot for Borislav Petkov
2018-04-27 21:34 ` Suravee Suthikulpanit [this message]
2018-05-12 21:10   ` [tip:x86/cpu] perf/events/amd/uncore: Fix amd_uncore_llc ID to use pre-defined cpu_llc_id tip-bot for Suravee Suthikulpanit
2018-04-27 21:34 ` [PATCH v2 3/4] x86/CPU: Rename intel_cacheinfo.c to cacheinfo.c Suravee Suthikulpanit
2018-05-12 21:10   ` [tip:x86/cpu] " tip-bot for Borislav Petkov
2018-04-27 21:34 ` [PATCH v2 4/4] x86/CPU/AMD: Calculate LLC ID from number of sharing threads Suravee Suthikulpanit
2018-05-12 21:11   ` [tip:x86/cpu] x86/CPU/AMD: Calculate last level cache " tip-bot for Suravee Suthikulpanit

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