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From: "Alastair D'Silva" <alastair@au1.ibm.com>
To: Frederic Barrat <fbarrat@linux.ibm.com>, linuxppc-dev@lists.ozlabs.org
Cc: mikey@neuling.org, arnd@arndb.de, linux-doc@vger.kernel.org,
	malat@debian.org, gregkh@linuxfoundation.org, corbet@lwn.net,
	vaibhav@linux.vnet.ibm.com, npiggin@gmail.com,
	linux-kernel@vger.kernel.org, fbarrat@linux.vnet.ibm.com,
	aneesh.kumar@linux.vnet.ibm.com, andrew.donnellan@au1.ibm.com,
	pombredanne@nexb.com, felix@linux.vnet.ibm.com,
	sukadev@linux.vnet.ibm.com
Subject: Re: [PATCH v2 1/7] powerpc: Add TIDR CPU feature for Power9
Date: Tue, 08 May 2018 13:13:37 +1000	[thread overview]
Message-ID: <1525749217.7796.48.camel@au1.ibm.com> (raw)
In-Reply-To: <2f95cc6f-9843-e2b9-6fca-2f4153317a5f@linux.ibm.com>

On Mon, 2018-05-07 at 19:17 +0200, Frederic Barrat wrote:
> 
> Le 18/04/2018 à 03:08, Alastair D'Silva a écrit :
> > From: Alastair D'Silva <alastair@d-silva.org>
> > 
> > This patch adds a CPU feature bit to show whether the CPU has
> > the TIDR register available, enabling as_notify/wait in userspace.
> > 
> > Signed-off-by: Alastair D'Silva <alastair@d-silva.org>
> > ---
> >   arch/powerpc/include/asm/cputable.h | 3 ++-
> >   arch/powerpc/kernel/dt_cpu_ftrs.c   | 1 +
> >   2 files changed, 3 insertions(+), 1 deletion(-)
> > 
> > diff --git a/arch/powerpc/include/asm/cputable.h
> > b/arch/powerpc/include/asm/cputable.h
> > index 4e332f3531c5..54c4cbbe57b4 100644
> > --- a/arch/powerpc/include/asm/cputable.h
> > +++ b/arch/powerpc/include/asm/cputable.h
> > @@ -215,6 +215,7 @@ static inline void cpu_feature_keys_init(void)
> > { }
> >   #define CPU_FTR_P9_TM_HV_ASSIST		LONG_ASM_CONST(0x0
> > 000100000000000)
> >   #define CPU_FTR_P9_TM_XER_SO_BUG	LONG_ASM_CONST(0x00002000
> > 00000000)
> >   #define CPU_FTR_P9_TLBIE_BUG		LONG_ASM_CONST(0x0000
> > 400000000000)
> > +#define CPU_FTR_P9_TIDR			LONG_ASM_CONST(0x00
> > 00800000000000)
> > 
> >   #ifndef __ASSEMBLY__
> > 
> > @@ -462,7 +463,7 @@ static inline void cpu_feature_keys_init(void)
> > { }
> >   	    CPU_FTR_CFAR | CPU_FTR_HVMODE | CPU_FTR_VMX_COPY | \
> >   	    CPU_FTR_DBELL | CPU_FTR_HAS_PPR | CPU_FTR_ARCH_207S |
> > \
> >   	    CPU_FTR_TM_COMP | CPU_FTR_ARCH_300 | CPU_FTR_PKEY | \
> > -	    CPU_FTR_P9_TLBIE_BUG)
> > +	    CPU_FTR_P9_TLBIE_BUG | CPU_FTR_P9_TIDR)
> >   #define CPU_FTRS_POWER9_DD1 ((CPU_FTRS_POWER9 |
> > CPU_FTR_POWER9_DD1) & \
> >   			     (~CPU_FTR_SAO))
> >   #define CPU_FTRS_POWER9_DD2_0 CPU_FTRS_POWER9
> > diff --git a/arch/powerpc/kernel/dt_cpu_ftrs.c
> > b/arch/powerpc/kernel/dt_cpu_ftrs.c
> > index 11a3a4fed3fb..10f8b7f55637 100644
> > --- a/arch/powerpc/kernel/dt_cpu_ftrs.c
> > +++ b/arch/powerpc/kernel/dt_cpu_ftrs.c
> > @@ -722,6 +722,7 @@ static __init void cpufeatures_cpu_quirks(void)
> >   	if ((version & 0xffff0000) == 0x004e0000) {
> >   		cur_cpu_spec->cpu_features &= ~(CPU_FTR_DAWR);
> >   		cur_cpu_spec->cpu_features |=
> > CPU_FTR_P9_TLBIE_BUG; > +		cur_cpu_spec->cpu_features 
> > |= CPU_FTR_P9_TIDR;
> 
> 
> Isn't it redundant with adding the flag to CPU_FTRS_POWER9?
> 
>    Fred
> 

No, cpu_features is populated from device tree, not from
CPU_FTRS_POWER9. Since TIDR will not be explicitly requested in the
device tree, we need to handle it in quirks.

-- 
Alastair D'Silva
Open Source Developer
Linux Technology Centre, IBM Australia
mob: 0423 762 819

  reply	other threads:[~2018-05-08  3:13 UTC|newest]

Thread overview: 59+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-04-17  2:09 [PATCH 0/7] ocxl: Implement Power9 as_notify/wait for OpenCAPI Alastair D'Silva
2018-04-17  2:09 ` [PATCH 1/7] powerpc: Add TIDR CPU feature for Power9 Alastair D'Silva
2018-04-17  4:09   ` Andrew Donnellan
2018-04-17  2:09 ` [PATCH 2/7] powerpc: Use TIDR CPU feature to control TIDR allocation Alastair D'Silva
2018-04-17  4:21   ` Andrew Donnellan
2018-04-17  5:31     ` Alastair D'Silva
2018-04-17  2:09 ` [PATCH 3/7] powerpc: use task_pid_nr() for TID allocation Alastair D'Silva
2018-04-17  2:09 ` [PATCH 4/7] ocxl: Rename pnv_ocxl_spa_remove_pe to clarify it's action Alastair D'Silva
2018-04-17  5:37   ` Andrew Donnellan
2018-04-17  2:09 ` [PATCH 5/7] ocxl: Expose the thread_id needed for wait on p9 Alastair D'Silva
2018-04-17  2:09 ` [PATCH 6/7] ocxl: Add an IOCTL so userspace knows which platform the kernel requires Alastair D'Silva
2018-04-17  2:09 ` [PATCH 7/7] ocxl: Document new OCXL IOCTLs Alastair D'Silva
2018-04-17  3:45   ` Andrew Donnellan
2018-04-18  1:08 ` [PATCH v2 0/7] ocxl: Implement Power9 as_notify/wait for OpenCAPI Alastair D'Silva
2018-04-18  1:08   ` [PATCH v2 1/7] powerpc: Add TIDR CPU feature for Power9 Alastair D'Silva
2018-04-18  7:03     ` Andrew Donnellan
2018-05-07 17:17     ` Frederic Barrat
2018-05-08  3:13       ` Alastair D'Silva [this message]
2018-04-18  1:08   ` [PATCH v2 2/7] powerpc: Use TIDR CPU feature to control TIDR allocation Alastair D'Silva
2018-04-18  7:13     ` Andrew Donnellan
2018-05-07 17:19     ` Frederic Barrat
2018-04-18  1:08   ` [PATCH v2 3/7] powerpc: use task_pid_nr() for TID allocation Alastair D'Silva
2018-04-20  8:43     ` Andrew Donnellan
2018-04-24 21:12       ` Sukadev Bhattiprolu
2018-04-26  9:25         ` Andrew Donnellan
2018-05-07 17:37     ` Frederic Barrat
2018-05-08  0:40       ` Alastair D'Silva
2018-04-18  1:08   ` [PATCH v2 4/7] ocxl: Rename pnv_ocxl_spa_remove_pe to clarify it's action Alastair D'Silva
2018-05-07 17:38     ` Frederic Barrat
2018-04-18  1:08   ` [PATCH v2 5/7] ocxl: Expose the thread_id needed for wait on p9 Alastair D'Silva
2018-04-23  7:16     ` Andrew Donnellan
2018-05-07 18:08     ` Frederic Barrat
2018-04-18  1:08   ` [PATCH v2 6/7] ocxl: Add an IOCTL so userspace knows what CPU features are available Alastair D'Silva
2018-04-20  7:25     ` Andrew Donnellan
2018-05-07 18:14     ` Frederic Barrat
2018-05-08  0:41       ` Alastair D'Silva
2018-05-08  3:50         ` Nicholas Piggin
2018-05-08  3:54           ` Alastair D'Silva
2018-04-18  1:08   ` [PATCH v2 7/7] ocxl: Document new OCXL IOCTLs Alastair D'Silva
2018-04-18  7:29     ` Andrew Donnellan
2018-05-07 18:15     ` Frederic Barrat
2018-05-09  0:42 ` [PATCH v3 0/7] ocxl: Implement Power9 as_notify/wait for OpenCAPI Alastair D'Silva
2018-05-09  0:42   ` [PATCH v3 1/7] powerpc: Add TIDR CPU feature for POWER9 Alastair D'Silva
2018-05-09  0:42   ` [PATCH v3 2/7] powerpc: Use TIDR CPU feature to control TIDR allocation Alastair D'Silva
2018-05-09  0:42   ` [PATCH v3 3/7] powerpc: use task_pid_nr() for TID allocation Alastair D'Silva
2018-05-09  0:42   ` [PATCH v3 4/7] ocxl: Rename pnv_ocxl_spa_remove_pe to clarify it's action Alastair D'Silva
2018-05-09  0:42   ` [PATCH v3 5/7] ocxl: Expose the thread_id needed for wait on POWER9 Alastair D'Silva
2018-05-11  5:01     ` Michael Ellerman
2018-05-09  0:42   ` [PATCH v3 6/7] ocxl: Add an IOCTL so userspace knows what OCXL features are available Alastair D'Silva
2018-05-09  0:42   ` [PATCH v3 7/7] ocxl: Document new OCXL IOCTLs Alastair D'Silva
2018-05-09  5:34   ` [PATCH v4 0/7] ocxl: Implement Power9 as_notify/wait for OpenCAPI Alastair D'Silva
2018-05-09  5:35     ` [PATCH v4 1/7] powerpc: Add TIDR CPU feature for POWER9 Alastair D'Silva
2018-05-09  5:35     ` [PATCH v4 2/7] powerpc: Use TIDR CPU feature to control TIDR allocation Alastair D'Silva
2018-05-09  5:35     ` [PATCH v4 3/7] powerpc: use task_pid_nr() for TID allocation Alastair D'Silva
2018-05-09  5:35     ` [PATCH v4 4/7] ocxl: Rename pnv_ocxl_spa_remove_pe to clarify it's action Alastair D'Silva
2018-05-09  5:35     ` [PATCH v4 5/7] ocxl: Expose the thread_id needed for wait on POWER9 Alastair D'Silva
2018-05-09  5:35     ` [PATCH v4 6/7] ocxl: Add an IOCTL so userspace knows what OCXL features are available Alastair D'Silva
2018-05-11  5:20       ` Michael Ellerman
2018-05-09  5:35     ` [PATCH v4 7/7] ocxl: Document new OCXL IOCTLs Alastair D'Silva

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