From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752352AbeEOWWW (ORCPT ); Tue, 15 May 2018 18:22:22 -0400 Received: from mail.kernel.org ([198.145.29.99]:49568 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751309AbeEOWWS (ORCPT ); Tue, 15 May 2018 18:22:18 -0400 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 To: mark.rutland@arm.com, matthias.bgg@gmail.com, mturquette@baylibre.com, p.zabel@pengutronix.de, robh+dt@kernel.org, sboyd@codeaurora.org, sean.wang@mediatek.com From: Stephen Boyd In-Reply-To: <665c38d5803573aa9a01471253f406301b1123a1.1524816502.git.sean.wang@mediatek.com> Cc: devicetree@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Sean Wang References: <665c38d5803573aa9a01471253f406301b1123a1.1524816502.git.sean.wang@mediatek.com> Message-ID: <152642293705.237094.16380764823129381223@swboyd.mtv.corp.google.com> User-Agent: alot/0.7 Subject: Re: [PATCH v2 2/6] dt-bindings: clock: mediatek: add g3dsys bindings Date: Tue, 15 May 2018 15:22:17 -0700 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from quoted-printable to 8bit by mail.home.local id w4FMMROO029240 Quoting sean.wang@mediatek.com (2018-04-27 01:14:43) > From: Sean Wang > > Add bindings to g3dsys providing necessary clock and reset control to > Mali-450. > > Signed-off-by: Sean Wang > --- Applied to clk-next