From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752439AbeEQJaY (ORCPT ); Thu, 17 May 2018 05:30:24 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:54456 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752112AbeEQJaU (ORCPT ); Thu, 17 May 2018 05:30:20 -0400 DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 0F00260558 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=tdas@codeaurora.org From: Taniya Das To: "Rafael J. Wysocki" , Viresh Kumar , linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, Stephen Boyd Cc: Rajendra Nayak , Amit Nischal , devicetree@vger.kernel.org, amit.kucheria@linaro.org, Taniya Das Subject: [v0 1/2] dt-bindings: clock: Introduce QCOM CPUFREQ FW bindings Date: Thu, 17 May 2018 15:00:00 +0530 Message-Id: <1526549401-25666-2-git-send-email-tdas@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1526549401-25666-1-git-send-email-tdas@codeaurora.org> References: <1526549401-25666-1-git-send-email-tdas@codeaurora.org> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add QCOM cpufreq firmware device bindings for Qualcomm Technology Inc's SoCs. This is required for managing the cpu frequency transitions which are controlled by firmware. Signed-off-by: Taniya Das --- .../bindings/cpufreq/cpufreq-qcom-fw.txt | 68 ++++++++++++++++++++++ 1 file changed, 68 insertions(+) create mode 100644 Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-fw.txt diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-fw.txt b/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-fw.txt new file mode 100644 index 0000000..bc912f4 --- /dev/null +++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-fw.txt @@ -0,0 +1,68 @@ +Qualcomm Technologies, Inc. CPUFREQ Bindings + +CPUFREQ FW is a hardware engine used by some Qualcomm Technologies, Inc. (QTI) +SoCs to manage frequency in hardware. It is capable of controlling frequency +for multiple clusters. + +Properties: +- compatible + Usage: required + Value type: + Definition: must be "qcom,cpufreq-fw". + +Note that #address-cells, #size-cells, and ranges shall be present to ensure +the cpufreq can address a freq-domain registers. + +A freq-domain sub-node would be defined for the cpus with the following +properties: + +- compatible: + Usage: required + Value type: + Definition: must be "cpufreq". + +- reg + Usage: required + Value type: + Definition: Addresses and sizes for the memory of the perf_base + , lut_base and en_base. +- reg-names + Usage: required + Value type: + Definition: Address names. Must be "perf_base", "lut_base", + "en_base". + Must be specified in the same order as the + corresponding addresses are specified in the reg + property. + +- qcom,cpulist + Usage: required + Value type: + Definition: List of related cpu handles which are under a cluster. + +Example: + qcom,cpufreq-fw { + compatible = "qcom,cpufreq-fw"; + + #address-cells = <1>; + #size-cells = <1>; + ranges; + + freq-domain-0 { + compatible = "cpufreq"; + reg = <0x17d43920 0x4>, + <0x17d43110 0x500>, + <0x17d41000 0x4>; + reg-names = "perf_base", "lut_base", "en_base"; + qcom,cpulist = <&CPU0 &CPU1 &CPU2 &CPU3>; + }; + + freq-domain-1 { + compatible = "cpufreq"; + reg = <0x17d46120 0x4>, + <0x17d45910 0x500>, + <0x17d45800 0x4>; + reg-names = "perf_base", "lut_base", "en_base"; + qcom,cpulist = <&CPU4 &CPU5 &CPU6 &CPU7>; + }; + }; -- Qualcomm INDIA, on behalf of Qualcomm Innovation Center, Inc.is a member of the Code Aurora Forum, hosted by the Linux Foundation.