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From: <Claudiu.Beznea@microchip.com>
To: <mturquette@baylibre.com>, <sboyd@kernel.org>,
	<robh+dt@kernel.org>, <mark.rutland@arm.com>,
	<Nicolas.Ferre@microchip.com>, <alexandre.belloni@bootlin.com>
Cc: <linux-clk@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <Claudiu.Beznea@microchip.com>
Subject: [PATCH v3 1/4] clk: at91: sckc: sama5d4 has no bypass support
Date: Fri, 10 May 2019 11:23:27 +0000	[thread overview]
Message-ID: <1557487388-32098-2-git-send-email-claudiu.beznea@microchip.com> (raw)
In-Reply-To: <1557487388-32098-1-git-send-email-claudiu.beznea@microchip.com>

From: Claudiu Beznea <claudiu.beznea@microchip.com>

The slow clock of SAMA5D4 has no bypass support thus remove it.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
---
 drivers/clk/at91/sckc.c | 6 ------
 1 file changed, 6 deletions(-)

diff --git a/drivers/clk/at91/sckc.c b/drivers/clk/at91/sckc.c
index e76b1d64e905..6c55a7a86f79 100644
--- a/drivers/clk/at91/sckc.c
+++ b/drivers/clk/at91/sckc.c
@@ -429,7 +429,6 @@ static void __init of_sama5d4_sckc_setup(struct device_node *np)
 	struct clk_init_data init;
 	const char *xtal_name;
 	const char *parent_names[2] = { "slow_rc_osc", "slow_osc" };
-	bool bypass;
 	int ret;
 
 	if (!regbase)
@@ -443,8 +442,6 @@ static void __init of_sama5d4_sckc_setup(struct device_node *np)
 
 	xtal_name = of_clk_get_parent_name(np, 0);
 
-	bypass = of_property_read_bool(np, "atmel,osc-bypass");
-
 	osc = kzalloc(sizeof(*osc), GFP_KERNEL);
 	if (!osc)
 		return;
@@ -459,9 +456,6 @@ static void __init of_sama5d4_sckc_setup(struct device_node *np)
 	osc->sckcr = regbase;
 	osc->startup_usec = 1200000;
 
-	if (bypass)
-		writel((readl(regbase) | AT91_SCKC_OSC32BYP), regbase);
-
 	hw = &osc->hw;
 	ret = clk_hw_register(NULL, &osc->hw);
 	if (ret) {
-- 
2.7.4


  reply	other threads:[~2019-05-10 11:23 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-05-10 11:23 [PATCH v3 0/4] add slow clock support for SAM9X60 Claudiu.Beznea
2019-05-10 11:23 ` Claudiu.Beznea [this message]
2019-05-10 20:11   ` [PATCH v3 1/4] clk: at91: sckc: sama5d4 has no bypass support Alexandre Belloni
2019-05-10 11:23 ` [PATCH v3 2/4] clk: at91: sckc: add support to specify registers bit offsets Claudiu.Beznea
2019-05-10 21:32   ` Alexandre Belloni
2019-05-16  8:10     ` Claudiu.Beznea
2019-05-17 21:13       ` Alexandre Belloni
2019-05-20  8:54         ` Claudiu.Beznea
2019-05-10 11:23 ` [PATCH v3 3/4] dt-bindings: clk: at91: add bindings for SAM9X60's slow clock controller Claudiu.Beznea
2019-05-10 21:33   ` Alexandre Belloni
2019-05-13 17:48   ` Rob Herring
2019-05-10 11:23 ` [PATCH v3 4/4] clk: at91: sckc: add support for SAM9X60 Claudiu.Beznea
2019-05-10 21:42   ` Alexandre Belloni

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