LKML Archive on lore.kernel.org
help / color / mirror / Atom feed
From: CK Hu <ck.hu@mediatek.com>
To: <yongqiang.niu@mediatek.com>
Cc: Philipp Zabel <p.zabel@pengutronix.de>,
	Rob Herring <robh+dt@kernel.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	"David Airlie" <airlied@linux.ie>,
	Daniel Vetter <daniel@ffwll.ch>,
	Mark Rutland <mark.rutland@arm.com>,
	<dri-devel@lists.freedesktop.org>, <devicetree@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-mediatek@lists.infradead.org>
Subject: Re: [PATCH v4, 10/33] drm/mediatek: add mutex sof into ddp private data
Date: Wed, 17 Jul 2019 13:28:14 +0800	[thread overview]
Message-ID: <1563341294.29169.13.camel@mtksdaap41> (raw)
In-Reply-To: <1562625253-29254-11-git-send-email-yongqiang.niu@mediatek.com>

Hi, Yongqiang:

On Tue, 2019-07-09 at 06:33 +0800, yongqiang.niu@mediatek.com wrote:
> From: Yongqiang Niu <yongqiang.niu@mediatek.com>
> 
> mutex sof will be ddp private data
> 

Reviewed-by: CK Hu <ck.hu@mediatek.com>

> Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
> ---
>  drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 43 +++++++++++++++++++++++++++-------
>  1 file changed, 35 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> index 8bde2cf..ab396ee 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> @@ -149,8 +149,19 @@ struct mtk_disp_mutex {
>  	bool claimed;
>  };
>  
> +enum mtk_ddp_mutex_sof_id {
> +	DDP_MUTEX_SOF_SINGLE_MODE,
> +	DDP_MUTEX_SOF_DSI0,
> +	DDP_MUTEX_SOF_DSI1,
> +	DDP_MUTEX_SOF_DPI0,
> +	DDP_MUTEX_SOF_DPI1,
> +	DDP_MUTEX_SOF_DSI2,
> +	DDP_MUTEX_SOF_DSI3,
> +};
> +
>  struct mtk_ddp_data {
>  	const unsigned int *mutex_mod;
> +	const unsigned int *mutex_sof;
>  	const unsigned int mutex_mod_reg;
>  };
>  
> @@ -209,18 +220,31 @@ struct mtk_ddp {
>  	[DDP_COMPONENT_WDMA1] = MT8173_MUTEX_MOD_DISP_WDMA1,
>  };
>  
> +static const unsigned int mt2712_mutex_sof[DDP_MUTEX_SOF_DSI3 + 1] = {
> +	[DDP_MUTEX_SOF_SINGLE_MODE] = MUTEX_SOF_SINGLE_MODE,
> +	[DDP_MUTEX_SOF_DSI0] = MUTEX_SOF_DSI0,
> +	[DDP_MUTEX_SOF_DSI1] = MUTEX_SOF_DSI1,
> +	[DDP_MUTEX_SOF_DPI0] = MUTEX_SOF_DPI0,
> +	[DDP_MUTEX_SOF_DPI1] = MUTEX_SOF_DPI1,
> +	[DDP_MUTEX_SOF_DSI2] = MUTEX_SOF_DSI2,
> +	[DDP_MUTEX_SOF_DSI3] = MUTEX_SOF_DSI3,
> +};
> +
>  static const struct mtk_ddp_data mt2701_ddp_driver_data = {
>  	.mutex_mod = mt2701_mutex_mod,
> +	.mutex_sof = mt2712_mutex_sof,
>  	.mutex_mod_reg = MT2701_DISP_MUTEX0_MOD0,
>  };
>  
>  static const struct mtk_ddp_data mt2712_ddp_driver_data = {
>  	.mutex_mod = mt2712_mutex_mod,
> +	.mutex_sof = mt2712_mutex_sof,
>  	.mutex_mod_reg = MT2701_DISP_MUTEX0_MOD0,
>  };
>  
>  static const struct mtk_ddp_data mt8173_ddp_driver_data = {
>  	.mutex_mod = mt8173_mutex_mod,
> +	.mutex_sof = mt2712_mutex_sof,
>  	.mutex_mod_reg = MT2701_DISP_MUTEX0_MOD0,
>  };
>  
> @@ -462,28 +486,29 @@ void mtk_disp_mutex_add_comp(struct mtk_disp_mutex *mutex,
>  	struct mtk_ddp *ddp = container_of(mutex, struct mtk_ddp,
>  					   mutex[mutex->id]);
>  	unsigned int reg;
> +	unsigned int sof_id;
>  	unsigned int offset;
>  
>  	WARN_ON(&ddp->mutex[mutex->id] != mutex);
>  
>  	switch (id) {
>  	case DDP_COMPONENT_DSI0:
> -		reg = MUTEX_SOF_DSI0;
> +		sof_id = DDP_MUTEX_SOF_DSI0;
>  		break;
>  	case DDP_COMPONENT_DSI1:
> -		reg = MUTEX_SOF_DSI0;
> +		sof_id = DDP_MUTEX_SOF_DSI0;
>  		break;
>  	case DDP_COMPONENT_DSI2:
> -		reg = MUTEX_SOF_DSI2;
> +		sof_id = DDP_MUTEX_SOF_DSI2;
>  		break;
>  	case DDP_COMPONENT_DSI3:
> -		reg = MUTEX_SOF_DSI3;
> +		sof_id = DDP_MUTEX_SOF_DSI3;
>  		break;
>  	case DDP_COMPONENT_DPI0:
> -		reg = MUTEX_SOF_DPI0;
> +		sof_id = DDP_MUTEX_SOF_DPI0;
>  		break;
>  	case DDP_COMPONENT_DPI1:
> -		reg = MUTEX_SOF_DPI1;
> +		sof_id = DDP_MUTEX_SOF_DPI1;
>  		break;
>  	default:
>  		if (ddp->data->mutex_mod[id] < 32) {
> @@ -501,7 +526,8 @@ void mtk_disp_mutex_add_comp(struct mtk_disp_mutex *mutex,
>  		return;
>  	}
>  
> -	writel_relaxed(reg, ddp->regs + DISP_REG_MUTEX_SOF(mutex->id));
> +	writel_relaxed(ddp->data->mutex_sof[sof_id],
> +		       ddp->regs + DISP_REG_MUTEX_SOF(mutex->id));
>  }
>  
>  void mtk_disp_mutex_remove_comp(struct mtk_disp_mutex *mutex,
> @@ -522,7 +548,8 @@ void mtk_disp_mutex_remove_comp(struct mtk_disp_mutex *mutex,
>  	case DDP_COMPONENT_DPI0:
>  	case DDP_COMPONENT_DPI1:
>  		writel_relaxed(MUTEX_SOF_SINGLE_MODE,
> -			       ddp->regs + DISP_REG_MUTEX_SOF(mutex->id));
> +			       ddp->regs +
> +			       DISP_REG_MUTEX_SOF(mutex->id));
>  		break;
>  	default:
>  		if (ddp->data->mutex_mod[id] < 32) {



  reply	other threads:[~2019-07-17  5:28 UTC|newest]

Thread overview: 56+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-07-08 22:33 [PATCH v4, 00/33] add drm support for MT8183 yongqiang.niu
2019-07-08 22:33 ` [PATCH v4, 01/33] dt-bindings: mediatek: add binding for mt8183 display yongqiang.niu
2019-07-17  3:22   ` CK Hu
2019-07-08 22:33 ` [PATCH v4, 02/33] dt-bindings: mediatek: add ovl_2l description " yongqiang.niu
2019-07-24 20:15   ` Rob Herring
2019-07-08 22:33 ` [PATCH v4, 03/33] dt-bindings: mediatek: add ccorr " yongqiang.niu
2019-07-17  3:37   ` CK Hu
2019-07-08 22:33 ` [PATCH v4, 04/33] dt-bindings: mediatek: add dither " yongqiang.niu
2019-07-17  3:40   ` CK Hu
2019-07-08 22:33 ` [PATCH v4, 05/33] dt-bindings: mediatek: add RDMA1 " yongqiang.niu
2019-07-24 20:16   ` Rob Herring
2019-07-25  3:20     ` CK Hu
2019-07-25 22:23       ` Rob Herring
2019-07-08 22:33 ` [PATCH v4, 06/33] dt-bindings: mediatek: add mutex " yongqiang.niu
2019-07-16 23:59   ` Ryan Case
2019-07-08 22:33 ` [PATCH v4, 07/33] arm64: dts: add display nodes for mt8183 yongqiang.niu
2019-07-08 22:33 ` [PATCH v4, 08/33] drm/mediatek: add mutex mod into ddp private data yongqiang.niu
2019-07-17  5:22   ` CK Hu
2019-07-08 22:33 ` [PATCH v4, 09/33] drm/mediatek: add mutex mod register offset " yongqiang.niu
2019-07-17  5:23   ` CK Hu
2019-07-08 22:33 ` [PATCH v4, 10/33] drm/mediatek: add mutex sof " yongqiang.niu
2019-07-17  5:28   ` CK Hu [this message]
2019-07-08 22:33 ` [PATCH v4, 11/33] drm/mediatek: add mutex sof register offset " yongqiang.niu
2019-07-17  5:31   ` CK Hu
2019-07-08 22:33 ` [PATCH v4, 12/33] drm/mediatek: split DISP_REG_CONFIG_DSI_SEL setting into another use case yongqiang.niu
2019-07-17  5:35   ` CK Hu
2019-08-29 12:39     ` Yongqiang Niu
2019-07-08 22:33 ` [PATCH v4, 13/33] drm/mediatek: add mmsys private data for ddp path config yongqiang.niu
2019-07-17  5:46   ` CK Hu
2019-07-08 22:33 ` [PATCH v4, 14/33] drm/mediatek: move rdma sout from mtk_ddp_mout_en into mtk_ddp_sout_sel yongqiang.niu
2019-07-08 22:33 ` [PATCH v4, 15/33] drm/mediatek: add ddp component CCORR yongqiang.niu
2019-07-08 22:33 ` [PATCH v4, 16/33] drm/mediatek: add commponent OVL_2L0 yongqiang.niu
2019-07-08 22:33 ` [PATCH v4, 17/33] drm/mediatek: add component OVL_2L1 yongqiang.niu
2019-07-08 22:33 ` [PATCH v4, 18/33] drm/mediatek: add component DITHER yongqiang.niu
2019-07-08 22:33 ` [PATCH v4, 19/33] drm/mediatek: add gmc_bits for ovl private data yongqiang.niu
2019-07-08 22:34 ` [PATCH v4, 20/33] drm/medaitek: add layer_nr " yongqiang.niu
2019-07-08 22:34 ` [PATCH v4, 21/33] drm/mediatek: add function to background color input select for ovl/ovl_2l direct link yongqiang.niu
2019-07-17  5:53   ` CK Hu
2019-07-08 22:34 ` [PATCH v4, 22/33] drm/mediatek: add background color input select function for ovl/ovl_2l yongqiang.niu
2019-07-17  5:58   ` CK Hu
2019-07-08 22:34 ` [PATCH v4, 23/33] drm/mediatek: add ovl0/ovl_2l0 usecase yongqiang.niu
2019-07-16 23:13   ` Ryan Case
2019-07-17  6:47   ` CK Hu
2019-08-29 13:15     ` Yongqiang Niu
2019-07-08 22:34 ` [PATCH v4, 24/33] drm/mediatek: distinguish ovl and ovl_2l by layer_nr yongqiang.niu
2019-07-17  6:55   ` CK Hu
2019-07-08 22:34 ` [PATCH v4, 25/33] drm/mediatek: add clock property check before get it yongqiang.niu
2019-07-17  7:01   ` CK Hu
2019-07-08 22:34 ` [PATCH v4, 26/33] drm/mediatek: add connection from OVL0 to OVL_2L0 yongqiang.niu
2019-07-08 22:34 ` [PATCH v4, 27/33] drm/mediatek: add connection from RDMA0 to COLOR0 yongqiang.niu
2019-07-08 22:34 ` [PATCH v4, 28/33] drm/mediatek: add connection from RDMA1 to DSI0 yongqiang.niu
2019-07-08 22:34 ` [PATCH v4, 29/33] drm/mediatek: add connection from OVL_2L0 to RDMA0 yongqiang.niu
2019-07-08 22:34 ` [PATCH v4, 30/33] drm/mediatek: add connection from OVL_2L1 to RDMA1 yongqiang.niu
2019-07-08 22:34 ` [PATCH v4, 31/33] drm/mediatek: add connection from DITHER0 to DSI0 yongqiang.niu
2019-07-08 22:34 ` [PATCH v4, 32/33] drm/mediatek: add connection from RDMA0 " yongqiang.niu
2019-07-08 22:34 ` [PATCH v4, 33/33] drm/mediatek: add support for mediatek SOC MT8183 yongqiang.niu

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1563341294.29169.13.camel@mtksdaap41 \
    --to=ck.hu@mediatek.com \
    --cc=airlied@linux.ie \
    --cc=daniel@ffwll.ch \
    --cc=devicetree@vger.kernel.org \
    --cc=dri-devel@lists.freedesktop.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-mediatek@lists.infradead.org \
    --cc=mark.rutland@arm.com \
    --cc=matthias.bgg@gmail.com \
    --cc=p.zabel@pengutronix.de \
    --cc=robh+dt@kernel.org \
    --cc=yongqiang.niu@mediatek.com \
    --subject='Re: [PATCH v4, 10/33] drm/mediatek: add mutex sof into ddp private data' \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).