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From: zhiyong tao <zhiyong.tao@mediatek.com>
To: Chen-Yu Tsai <wenst@chromium.org>
Cc: Rob Herring <robh+dt@kernel.org>,
	Linus Walleij <linus.walleij@linaro.org>, <mark.rutland@arm.com>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Sean Wang <sean.wang@kernel.org>,
	srv_heupstream <srv_heupstream@mediatek.com>,
	<hui.liu@mediatek.com>, Eddie Huang <eddie.huang@mediatek.com>,
	<light.hsieh@mediatek.com>, <biao.huang@mediatek.com>,
	<hongzhou.yang@mediatek.com>, <sean.wang@mediatek.com>,
	<seiya.wang@mediatek.com>, <devicetree@vger.kernel.org>,
	LKML <linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-mediatek@lists.infradead.org>,
	<linux-gpio@vger.kernel.org>
Subject: Re: [PATCH v10 1/2] dt-bindings: pinctrl: mt8195: add rsel define
Date: Thu, 22 Jul 2021 15:54:30 +0800	[thread overview]
Message-ID: <1626940470.29611.9.camel@mhfsdcap03> (raw)
In-Reply-To: <CAGXv+5GXg0RuOQkh4vaRmcLpehZiXnEUXBvEaObiatAa1sXvaA@mail.gmail.com>

On Tue, 2021-07-13 at 15:17 +0800, Chen-Yu Tsai wrote:
> Hi,
> 
> On Sat, Jul 10, 2021 at 4:17 PM Zhiyong Tao <zhiyong.tao@mediatek.com> wrote:
> >
> > This patch adds rsel define for mt8195.
> >
> > Signed-off-by: Zhiyong Tao <zhiyong.tao@mediatek.com>
> > ---
> >  include/dt-bindings/pinctrl/mt65xx.h | 9 +++++++++
> >  1 file changed, 9 insertions(+)
> >
> > diff --git a/include/dt-bindings/pinctrl/mt65xx.h b/include/dt-bindings/pinctrl/mt65xx.h
> > index 7e16e58fe1f7..f5934abcd1bd 100644
> > --- a/include/dt-bindings/pinctrl/mt65xx.h
> > +++ b/include/dt-bindings/pinctrl/mt65xx.h
> > @@ -16,6 +16,15 @@
> >  #define MTK_PUPD_SET_R1R0_10 102
> >  #define MTK_PUPD_SET_R1R0_11 103
> >
> > +#define MTK_PULL_SET_RSEL_000  200
> > +#define MTK_PULL_SET_RSEL_001  201
> > +#define MTK_PULL_SET_RSEL_010  202
> > +#define MTK_PULL_SET_RSEL_011  203
> > +#define MTK_PULL_SET_RSEL_100  204
> > +#define MTK_PULL_SET_RSEL_101  205
> > +#define MTK_PULL_SET_RSEL_110  206
> > +#define MTK_PULL_SET_RSEL_111  207
> > +
> 
> Instead of all the obscure macros and the new custom "rsel" property,
> which BTW is not in the bindings, can't we just list the actual bias
> resistance of each setting? We could also migrate away from R1R0.
> 
==>Hi Chenyu,
The rsel actual bias resistance of each setting:

MTK_PULL_SET_RSEL_000:75K in PU, 75k in PD;
MTK_PULL_SET_RSEL_001:10k in PU, 5k in PD;
MTK_PULL_SET_RSEL_010:5k in PU, 75k in PD;
MTK_PULL_SET_RSEL_011:4k in PU, 5K in PD;
MTK_PULL_SET_RSEL_100:3k in PU, 75k in PD;
MTK_PULL_SET_RSEL_101:2k in PU, 5K in PD;
MTK_PULL_SET_RSEL_110:1.5k in PU, 75k in PD;
MTK_PULL_SET_RSEL_111:1k in PU, 5k in PD.

The rsel actual bias resistance is different between PU and PD.

> Then we can specify the setting with the standard bias-pull-up/down
> properties [1].
> 
> Also, please ask internally if Mediatek could relicense all the header
> files that Mediatek has contributed under include/dt-bindings/pinctrl/ [2]
> to GPL-2.0 and BSD dual license. These files are part of the DT bindings
> and we really want them to be dual licensed as well, and not just the
> YAML files.
> 

==> We will confirm it internally and reply it later.

Thanks.
> 
> Regards
> ChenYu
> 
> 
> [1] https://elixir.bootlin.com/linux/latest/source/Documentation/devicetree/bindings/pinctrl/pincfg-node.yaml#L37
> [2] Note that a few files were contributed by other people
> 
> >  #define MTK_DRIVE_2mA  2
> >  #define MTK_DRIVE_4mA  4
> >  #define MTK_DRIVE_6mA  6
> > --
> > 2.18.0
> > _______________________________________________
> > Linux-mediatek mailing list
> > Linux-mediatek@lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-mediatek


  reply	other threads:[~2021-07-22  7:54 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-10  8:17 [PATCH v10 0/2] Mediatek pinctrl patch on mt8195 Zhiyong Tao
2021-07-10  8:17 ` [PATCH v10 1/2] dt-bindings: pinctrl: mt8195: add rsel define Zhiyong Tao
2021-07-13  7:17   ` Chen-Yu Tsai
2021-07-22  7:54     ` zhiyong tao [this message]
2021-07-26  8:02       ` Chen-Yu Tsai
     [not found]         ` <07388dac4e25e0f260725e8f80ba099d5aa80949.camel@mediatek.com>
2021-07-29  9:43           ` Chen-Yu Tsai
2021-08-04 23:01             ` Linus Walleij
2021-08-16  6:10               ` Chen-Yu Tsai
     [not found]                 ` <4fd12d5c53f6492e5fa3ba94a78b9a149f5b6ed9.camel@mediatek.com>
2021-08-16 15:37                   ` Chen-Yu Tsai
2021-08-16 23:00                     ` Linus Walleij
     [not found]                       ` <a7c8ab68ac3513865698cde27e665bdd554f459e.camel@mediatek.com>
2021-08-17  5:44                         ` Chen-Yu Tsai
     [not found]                           ` <d40f6d5fd26aedb13e7a393202e5794b1893ecf8.camel@mediatek.com>
2021-08-17 20:09                             ` Linus Walleij
2021-08-18  6:25                               ` Chen-Yu Tsai
2021-07-10  8:17 ` [PATCH v10 2/2] pinctrl: mediatek: add rsel setting on MT8195 Zhiyong Tao

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