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From: Rajesh Patil <rajpat@codeaurora.org>
To: Andy Gross <agross@kernel.org>,
	Bjorn Andersson <bjorn.andersson@linaro.org>,
	Rob Herring <robh+dt@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org, rnayak@codeaurora.org,
	saiprakash.ranjan@codeaurora.org, msavaliy@qti.qualcomm.com,
	skakit@codeaurora.org, Roja Rani Yarubandi <rojay@codeaurora.org>,
	Rajesh Patil <rajpat@codeaurora.org>
Subject: [PATCH V4 3/4] arm64: dts: sc7280: Update QUPv3 Debug UART DT node
Date: Mon, 26 Jul 2021 19:10:46 +0530	[thread overview]
Message-ID: <1627306847-25308-4-git-send-email-rajpat@codeaurora.org> (raw)
In-Reply-To: <1627306847-25308-1-git-send-email-rajpat@codeaurora.org>

From: Roja Rani Yarubandi <rojay@codeaurora.org>

Update QUPv3 Debug UART DT node with the interconnect names and
functions for SC7280 SoC.

Split the Debug UART pin control functions.

Signed-off-by: Roja Rani Yarubandi <rojay@codeaurora.org>
Signed-off-by: Rajesh Patil <rajpat@codeaurora.org>
---
Changes in V4:
 - As per Bjorn's comment, posting this debug-uart node update
   as seperate patch

 arch/arm64/boot/dts/qcom/sc7280-idp.dts | 18 +++++++-----------
 arch/arm64/boot/dts/qcom/sc7280.dtsi    | 28 ++++++++++++++++++++++++----
 2 files changed, 31 insertions(+), 15 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dts b/arch/arm64/boot/dts/qcom/sc7280-idp.dts
index f63cf51..a50c9e5 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-idp.dts
+++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dts
@@ -383,18 +383,14 @@
 	bias-pull-up;
 };
 
-&qup_uart5_default {
-	tx {
-		pins = "gpio46";
-		drive-strength = <2>;
-		bias-disable;
-	};
+&qup_uart5_tx {
+	drive-strength = <2>;
+	bias-disable;
+};
 
-	rx {
-		pins = "gpio47";
-		drive-strength = <2>;
-		bias-pull-up;
-	};
+&qup_uart5_rx {
+	drive-strength = <2>;
+	bias-pull-up;
 };
 
 &sdc1_on {
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 455e58f..951818f 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -853,8 +853,13 @@
 				clock-names = "se";
 				clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>;
 				pinctrl-names = "default";
-				pinctrl-0 = <&qup_uart5_default>;
+				pinctrl-0 = <&qup_uart5_cts>, <&qup_uart5_rts>, <&qup_uart5_tx>, <&qup_uart5_rx>;
 				interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>;
+				power-domains = <&rpmhpd SC7280_CX>;
+				operating-points-v2 = <&qup_opp_table>;
+				interconnects = <&clk_virt MASTER_QUP_CORE_0 0 &clk_virt SLAVE_QUP_CORE_0 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &cnoc2 SLAVE_QUP_0 0>;
+				interconnect-names = "qup-core", "qup-config";
 				status = "disabled";
 			};
 
@@ -2234,9 +2239,24 @@
 				function = "qup04";
 			};
 
-			qup_uart5_default: qup-uart5-default {
-				pins = "gpio46", "gpio47";
-				function = "qup13";
+			qup_uart5_cts: qup-uart5-cts {
+				pins = "gpio20";
+				function = "qup05";
+			};
+
+			qup_uart5_rts: qup-uart5-rts {
+				pins = "gpio21";
+				function = "qup05";
+			};
+
+			qup_uart5_tx: qup-uart5-tx {
+				pins = "gpio22";
+				function = "qup05";
+			};
+
+			qup_uart5_rx: qup-uart5-rx {
+				pins = "gpio23";
+				function = "qup05";
 			};
 
 			qup_uart6_cts: qup-uart6-cts {
-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member 
of Code Aurora Forum, hosted by The Linux Foundation


  parent reply	other threads:[~2021-07-26 13:43 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-26 13:40 [PATCH V4 0/4] Add QSPI and QUPv3 DT nodes for SC7280 SoC Rajesh Patil
2021-07-26 13:40 ` [PATCH V4 1/4] arm64: dts: sc7280: Add QSPI node Rajesh Patil
2021-07-26 16:07   ` Matthias Kaehlcke
2021-08-11 12:14     ` rajpat
2021-07-26 13:40 ` [PATCH V4 2/4] arm64: dts: sc7280: Add QUPv3 wrapper_0 nodes Rajesh Patil
2021-07-26 16:02   ` Matthias Kaehlcke
2021-08-11 12:13     ` rajpat
2021-08-11 14:52       ` Matthias Kaehlcke
2021-08-12  7:13         ` rajpat
2021-08-12 12:49           ` Matthias Kaehlcke
2021-07-27 19:20   ` Stephen Boyd
2021-08-11 12:17     ` rajpat
2021-07-26 13:40 ` Rajesh Patil [this message]
2021-07-26 15:42   ` [PATCH V4 3/4] arm64: dts: sc7280: Update QUPv3 Debug UART DT node Matthias Kaehlcke
2021-08-11 12:04     ` rajpat
2021-07-26 13:40 ` [PATCH V4 4/4] arm64: dts: sc7280: Add QUPv3 wrapper_1 nodes Rajesh Patil
2021-07-27  0:14 ` [PATCH V4 0/4] Add QSPI and QUPv3 DT nodes for SC7280 SoC Stephen Boyd
2021-08-11 12:14   ` rajpat

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