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From: Will Deacon <will@kernel.org>
To: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>,
	Joerg Roedel <joro@8bytes.org>,
	Robin Murphy <robin.murphy@arm.com>
Cc: catalin.marinas@arm.com, kernel-team@android.com,
	Will Deacon <will@kernel.org>,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, Tomasz Figa <tfiga@chromium.org>,
	linux-arm-msm@vger.kernel.org,
	Bjorn Andersson <bjorn.andersson@linaro.org>,
	Krishna Reddy <vdumpa@nvidia.com>,
	iommu@lists.linux-foundation.org,
	Doug Anderson <dianders@chromium.org>,
	Thierry Reding <treding@nvidia.com>
Subject: Re: [PATCHv5] iommu/arm-smmu: Optimize ->tlb_flush_walk() for qcom implementation
Date: Fri, 13 Aug 2021 15:33:48 +0100	[thread overview]
Message-ID: <162886044327.2821414.7990736519109651727.b4-ty@kernel.org> (raw)
In-Reply-To: <20210811160426.10312-1-saiprakash.ranjan@codeaurora.org>

On Wed, 11 Aug 2021 21:34:26 +0530, Sai Prakash Ranjan wrote:
> Currently for iommu_unmap() of large scatter-gather list with page size
> elements, the majority of time is spent in flushing of partial walks in
> __arm_lpae_unmap() which is a VA based TLB invalidation invalidating
> page-by-page on iommus like arm-smmu-v2 (TLBIVA).
> 
> For example: to unmap a 32MB scatter-gather list with page size elements
> (8192 entries), there are 16->2MB buffer unmaps based on the pgsize (2MB
> for 4K granule) and each of 2MB will further result in 512 TLBIVAs (2MB/4K)
> resulting in a total of 8192 TLBIVAs (512*16) for 16->2MB causing a huge
> overhead.
> 
> [...]

Applied to will (for-joerg/arm-smmu/updates), thanks!

[1/1] iommu/arm-smmu: Optimize ->tlb_flush_walk() for qcom implementation
      https://git.kernel.org/will/c/ef75702d6d65

Cheers,
-- 
Will

https://fixes.arm64.dev
https://next.arm64.dev
https://will.arm64.dev

      reply	other threads:[~2021-08-13 14:34 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-11 16:04 Sai Prakash Ranjan
2021-08-13 14:33 ` Will Deacon [this message]

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