[GIT PULL] timers driver for v5.15

[GIT PULL] timers driver for v5.15

[Daniel Lezcano]

Hi Thomas,

The following changes since commit f80e21489590c00f46226d5802d900e6f66e5633:

  hrtimer: Unbreak hrtimer_force_reprogram() (2021-08-12 22:34:40 +0200)

are available in the Git repository at:

  https://git.linaro.org/people/daniel.lezcano/linux.git tags/timers-v5.15

for you to fetch changes up to f196ae282070d798c9144771db65577910d58566:

  dt-bindings: timer: Add ABIs for new Ingenic SoCs (2021-08-21 09:58:17
+0200)

----------------------------------------------------------------
- Prioritize the ARM architected timer on Exynos platform when the
  architecture is ARM64 (Will Deacon)

- Mark the Exynos timer as a per CPU timer (Will Deacon)

- DT conversion to yaml for the rockchip platform (Ezequiel Garcia)

- Fix IRQ setup if there are two channels on the sh_cmt timer (Phong
  Hoang)

- Use bitfield helper macros in the Ingenic timer (Zhou Yanjie)

- Clear any pending interrupt to prevent an abort of the suspend on
  the Mediatek platform (Fengquan Chen)

- Add DT bindings for new Ingenic SoCs (Zhou Yanjie)

----------------------------------------------------------------
Ezequiel Garcia (1):
      dt-bindings: timer: convert rockchip,rk-timer.txt to YAML

Fengquan Chen (1):
      clocksource/drivers/mediatek: Optimize systimer irq clear flow on
shutdown

Linus Walleij (1):
      clocksource/drivers/fttmr010: Pass around less pointers

Phong Hoang (1):
      clocksource/drivers/sh_cmt: Fix wrong setting if don't request IRQ
for clock source channel

Will Deacon (2):
      clocksource/drivers/exynos_mct: Prioritise Arm arch timer on arm64
      clocksource/drivers/exynos_mct: Mark MCT device as
CLOCK_EVT_FEAT_PERCPU

周琰杰 (Zhou Yanjie) (2):
      clocksource/drivers/ingenic: Use bitfield macro helpers
      dt-bindings: timer: Add ABIs for new Ingenic SoCs

 Documentation/devicetree/bindings/timer/rockchip,rk-timer.txt  | 27
---------------------------
 Documentation/devicetree/bindings/timer/rockchip,rk-timer.yaml | 64
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 drivers/clocksource/exynos_mct.c                               | 16
+++++++++++++---
 drivers/clocksource/ingenic-sysost.c                           | 13
+++++++------
 drivers/clocksource/sh_cmt.c                                   | 30
++++++++++++++++++------------
 drivers/clocksource/timer-fttmr010.c                           | 32
++++++++++++++++----------------
 drivers/clocksource/timer-mediatek.c                           |  8
++++++--
 include/dt-bindings/clock/ingenic,sysost.h                     | 19
+++++++++++++++++++
 8 files changed, 143 insertions(+), 66 deletions(-)
 delete mode 100644
Documentation/devicetree/bindings/timer/rockchip,rk-timer.txt
 create mode 100644
Documentation/devicetree/bindings/timer/rockchip,rk-timer.yaml
w

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[tip: timers/core] Merge tag 'timers-v5.15' of https://git.linaro.org/people/daniel.lezcano/linux into timers/core

[tip-bot2 for Thomas Gleixner]

The following commit has been merged into the timers/core branch of tip:

Commit-ID:     127c92feb74a6721f62587f1b89128808f049cf1
Gitweb:        https://git.kernel.org/tip/127c92feb74a6721f62587f1b89128808f049cf1
Author:        Thomas Gleixner <tglx@linutronix.de>
AuthorDate:    Thu, 26 Aug 2021 18:20:50 +02:00
Committer:     Thomas Gleixner <tglx@linutronix.de>
CommitterDate: Thu, 26 Aug 2021 18:20:50 +02:00

Merge tag 'timers-v5.15' of https://git.linaro.org/people/daniel.lezcano/linux into timers/core

Pull timer driver updates from Daniel Lezcano:

 - Prioritize the ARM architected timer on Exynos platform when the
   architecture is ARM64 (Will Deacon)

 - Mark the Exynos timer as a per CPU timer (Will Deacon)

 - DT conversion to yaml for the rockchip platform (Ezequiel Garcia)

 - Fix IRQ setup if there are two channels on the sh_cmt timer (Phong
   Hoang)

 - Use bitfield helper macros in the Ingenic timer (Zhou Yanjie)

 - Clear any pending interrupt to prevent an abort of the suspend on
   the Mediatek platform (Fengquan Chen)

 - Add DT bindings for new Ingenic SoCs (Zhou Yanjie)

Link: https://lore.kernel.org/r/c14ad27a-b1c6-6043-0f5e-71dd984bb4ba@linaro.org
---