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From: "tip-bot2 for Kan Liang" <tip-bot2@linutronix.de>
To: linux-tip-commits@vger.kernel.org
Cc: Kan Liang <kan.liang@linux.intel.com>,
	"Peter Zijlstra (Intel)" <peterz@infradead.org>,
	x86@kernel.org, linux-kernel@vger.kernel.org
Subject: [tip: perf/core] perf/x86/intel/uncore: Fix Intel SPR M3UPI event constraints
Date: Tue, 31 Aug 2021 12:07:40 -0000	[thread overview]
Message-ID: <163041166071.25758.13557631748713413002.tip-bot2@tip-bot2> (raw)
In-Reply-To: <1629991963-102621-8-git-send-email-kan.liang@linux.intel.com>

The following commit has been merged into the perf/core branch of tip:

Commit-ID:     4034fb207e302cc0b1f304084d379640c1fb1436
Gitweb:        https://git.kernel.org/tip/4034fb207e302cc0b1f304084d379640c1fb1436
Author:        Kan Liang <kan.liang@linux.intel.com>
AuthorDate:    Thu, 26 Aug 2021 08:32:43 -07:00
Committer:     Peter Zijlstra <peterz@infradead.org>
CommitterDate: Tue, 31 Aug 2021 13:59:37 +02:00

perf/x86/intel/uncore: Fix Intel SPR M3UPI event constraints

SPR M3UPI have the exact same event constraints as ICX, so add the
constraints.

Fixes: 2a8e51eae7c8 ("perf/x86/intel/uncore: Add Sapphire Rapids server M3UPI support")
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/1629991963-102621-8-git-send-email-kan.liang@linux.intel.com
---
 arch/x86/events/intel/uncore_snbep.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/x86/events/intel/uncore_snbep.c b/arch/x86/events/intel/uncore_snbep.c
index cd53057..eb2c6ce 100644
--- a/arch/x86/events/intel/uncore_snbep.c
+++ b/arch/x86/events/intel/uncore_snbep.c
@@ -5776,6 +5776,7 @@ static struct intel_uncore_type spr_uncore_upi = {
 static struct intel_uncore_type spr_uncore_m3upi = {
 	SPR_UNCORE_PCI_COMMON_FORMAT(),
 	.name			= "m3upi",
+	.constraints		= icx_uncore_m3upi_constraints,
 };
 
 static struct intel_uncore_type spr_uncore_mdf = {

      reply	other threads:[~2021-08-31 12:11 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-26 15:32 [PATCH 0/7] perf/x86/intel/uncore: Various fix for ICX and SPR kan.liang
2021-08-26 15:32 ` [PATCH 1/7] perf/x86/intel/uncore: Support extra IMC channel on Ice Lake server kan.liang
2021-08-31 12:07   ` [tip: perf/core] " tip-bot2 for Kan Liang
2021-08-26 15:32 ` [PATCH 2/7] perf/x86/intel/uncore: Fix invalid unit check kan.liang
2021-08-31 12:07   ` [tip: perf/core] " tip-bot2 for Kan Liang
2021-08-26 15:32 ` [PATCH 3/7] perf/x86/intel/uncore: Fix Intel ICX IIO event constraints kan.liang
2021-08-31 12:07   ` [tip: perf/core] " tip-bot2 for Kan Liang
2021-08-26 15:32 ` [PATCH 4/7] perf/x86/intel/uncore: Fix Intel SPR CHA " kan.liang
2021-08-31 12:07   ` [tip: perf/core] " tip-bot2 for Kan Liang
2021-08-26 15:32 ` [PATCH 5/7] perf/x86/intel/uncore: Fix Intel SPR IIO " kan.liang
2021-08-31 12:07   ` [tip: perf/core] " tip-bot2 for Kan Liang
2021-08-26 15:32 ` [PATCH 6/7] perf/x86/intel/uncore: Fix Intel SPR M2PCIE " kan.liang
2021-08-31 12:07   ` [tip: perf/core] " tip-bot2 for Kan Liang
2021-08-26 15:32 ` [PATCH 7/7] perf/x86/intel/uncore: Fix Intel SPR M3UPI " kan.liang
2021-08-31 12:07   ` tip-bot2 for Kan Liang [this message]

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