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From: "tip-bot2 for Kan Liang" <tip-bot2@linutronix.de>
To: linux-tip-commits@vger.kernel.org
Cc: Kan Liang <kan.liang@linux.intel.com>,
	"Peter Zijlstra (Intel)" <peterz@infradead.org>,
	x86@kernel.org, linux-kernel@vger.kernel.org
Subject: [tip: perf/core] perf/x86/intel/uncore: Fix Intel SPR M2PCIE event constraints
Date: Tue, 31 Aug 2021 12:07:41 -0000	[thread overview]
Message-ID: <163041166175.25758.8859491168761891164.tip-bot2@tip-bot2> (raw)
In-Reply-To: <1629991963-102621-7-git-send-email-kan.liang@linux.intel.com>

The following commit has been merged into the perf/core branch of tip:

Commit-ID:     f01d7d558e1855d4aa8e927b86111846536dd476
Gitweb:        https://git.kernel.org/tip/f01d7d558e1855d4aa8e927b86111846536dd476
Author:        Kan Liang <kan.liang@linux.intel.com>
AuthorDate:    Thu, 26 Aug 2021 08:32:42 -07:00
Committer:     Peter Zijlstra <peterz@infradead.org>
CommitterDate: Tue, 31 Aug 2021 13:59:37 +02:00

perf/x86/intel/uncore: Fix Intel SPR M2PCIE event constraints

Similar to the ICX M2PCIE  events, some of the SPR M2PCIE events also
have constraints. Add the constraints for SPR M2PCIE.

Fixes: f85ef898f884 ("perf/x86/intel/uncore: Add Sapphire Rapids server M2PCIe support")
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/1629991963-102621-7-git-send-email-kan.liang@linux.intel.com
---
 arch/x86/events/intel/uncore_snbep.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/x86/events/intel/uncore_snbep.c b/arch/x86/events/intel/uncore_snbep.c
index 2d75d21..cd53057 100644
--- a/arch/x86/events/intel/uncore_snbep.c
+++ b/arch/x86/events/intel/uncore_snbep.c
@@ -5690,9 +5690,16 @@ static struct intel_uncore_type spr_uncore_irp = {
 
 };
 
+static struct event_constraint spr_uncore_m2pcie_constraints[] = {
+	UNCORE_EVENT_CONSTRAINT(0x14, 0x3),
+	UNCORE_EVENT_CONSTRAINT(0x2d, 0x3),
+	EVENT_CONSTRAINT_END
+};
+
 static struct intel_uncore_type spr_uncore_m2pcie = {
 	SPR_UNCORE_COMMON_FORMAT(),
 	.name			= "m2pcie",
+	.constraints		= spr_uncore_m2pcie_constraints,
 };
 
 static struct intel_uncore_type spr_uncore_pcu = {

  reply	other threads:[~2021-08-31 12:11 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-26 15:32 [PATCH 0/7] perf/x86/intel/uncore: Various fix for ICX and SPR kan.liang
2021-08-26 15:32 ` [PATCH 1/7] perf/x86/intel/uncore: Support extra IMC channel on Ice Lake server kan.liang
2021-08-31 12:07   ` [tip: perf/core] " tip-bot2 for Kan Liang
2021-08-26 15:32 ` [PATCH 2/7] perf/x86/intel/uncore: Fix invalid unit check kan.liang
2021-08-31 12:07   ` [tip: perf/core] " tip-bot2 for Kan Liang
2021-08-26 15:32 ` [PATCH 3/7] perf/x86/intel/uncore: Fix Intel ICX IIO event constraints kan.liang
2021-08-31 12:07   ` [tip: perf/core] " tip-bot2 for Kan Liang
2021-08-26 15:32 ` [PATCH 4/7] perf/x86/intel/uncore: Fix Intel SPR CHA " kan.liang
2021-08-31 12:07   ` [tip: perf/core] " tip-bot2 for Kan Liang
2021-08-26 15:32 ` [PATCH 5/7] perf/x86/intel/uncore: Fix Intel SPR IIO " kan.liang
2021-08-31 12:07   ` [tip: perf/core] " tip-bot2 for Kan Liang
2021-08-26 15:32 ` [PATCH 6/7] perf/x86/intel/uncore: Fix Intel SPR M2PCIE " kan.liang
2021-08-31 12:07   ` tip-bot2 for Kan Liang [this message]
2021-08-26 15:32 ` [PATCH 7/7] perf/x86/intel/uncore: Fix Intel SPR M3UPI " kan.liang
2021-08-31 12:07   ` [tip: perf/core] " tip-bot2 for Kan Liang

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