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From: "tip-bot2 for Kan Liang" <tip-bot2@linutronix.de>
To: linux-tip-commits@vger.kernel.org
Cc: Kan Liang <kan.liang@linux.intel.com>,
	"Peter Zijlstra (Intel)" <peterz@infradead.org>,
	Andi Kleen <ak@linux.intel.com>,
	stable@vger.kernel.org, x86@kernel.org,
	linux-kernel@vger.kernel.org
Subject: [tip: perf/core] perf/x86/intel/uncore: Support extra IMC channel on Ice Lake server
Date: Tue, 31 Aug 2021 12:07:45 -0000	[thread overview]
Message-ID: <163041166578.25758.7789165084888949942.tip-bot2@tip-bot2> (raw)
In-Reply-To: <1629991963-102621-2-git-send-email-kan.liang@linux.intel.com>

The following commit has been merged into the perf/core branch of tip:

Commit-ID:     496a18f09374ad89b3ab4366019bc3975db90234
Gitweb:        https://git.kernel.org/tip/496a18f09374ad89b3ab4366019bc3975db90234
Author:        Kan Liang <kan.liang@linux.intel.com>
AuthorDate:    Thu, 26 Aug 2021 08:32:37 -07:00
Committer:     Peter Zijlstra <peterz@infradead.org>
CommitterDate: Tue, 31 Aug 2021 13:59:35 +02:00

perf/x86/intel/uncore: Support extra IMC channel on Ice Lake server

There are three channels on a Ice Lake server, but only two channels
will ever be active. Current perf only enables two channels.

Support the extra IMC channel, which may be activated on some Ice Lake
machines. For a non-activated channel, the SW can still access it. The
write will be ignored by the HW. 0 is always returned for the reading.

Fixes: 2b3b76b5ec67 ("perf/x86/intel/uncore: Add Ice Lake server uncore support")
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Andi Kleen <ak@linux.intel.com>
Cc: stable@vger.kernel.org
Link: https://lkml.kernel.org/r/1629991963-102621-2-git-send-email-kan.liang@linux.intel.com
---
 arch/x86/events/intel/uncore_snbep.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/x86/events/intel/uncore_snbep.c b/arch/x86/events/intel/uncore_snbep.c
index 5ddc0f3..ea29e89 100644
--- a/arch/x86/events/intel/uncore_snbep.c
+++ b/arch/x86/events/intel/uncore_snbep.c
@@ -452,7 +452,7 @@
 #define ICX_M3UPI_PCI_PMON_BOX_CTL		0xa0
 
 /* ICX IMC */
-#define ICX_NUMBER_IMC_CHN			2
+#define ICX_NUMBER_IMC_CHN			3
 #define ICX_IMC_MEM_STRIDE			0x4
 
 /* SPR */
@@ -5463,7 +5463,7 @@ static struct intel_uncore_ops icx_uncore_mmio_ops = {
 static struct intel_uncore_type icx_uncore_imc = {
 	.name		= "imc",
 	.num_counters   = 4,
-	.num_boxes	= 8,
+	.num_boxes	= 12,
 	.perf_ctr_bits	= 48,
 	.fixed_ctr_bits	= 48,
 	.fixed_ctr	= SNR_IMC_MMIO_PMON_FIXED_CTR,

  reply	other threads:[~2021-08-31 12:11 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-26 15:32 [PATCH 0/7] perf/x86/intel/uncore: Various fix for ICX and SPR kan.liang
2021-08-26 15:32 ` [PATCH 1/7] perf/x86/intel/uncore: Support extra IMC channel on Ice Lake server kan.liang
2021-08-31 12:07   ` tip-bot2 for Kan Liang [this message]
2021-08-26 15:32 ` [PATCH 2/7] perf/x86/intel/uncore: Fix invalid unit check kan.liang
2021-08-31 12:07   ` [tip: perf/core] " tip-bot2 for Kan Liang
2021-08-26 15:32 ` [PATCH 3/7] perf/x86/intel/uncore: Fix Intel ICX IIO event constraints kan.liang
2021-08-31 12:07   ` [tip: perf/core] " tip-bot2 for Kan Liang
2021-08-26 15:32 ` [PATCH 4/7] perf/x86/intel/uncore: Fix Intel SPR CHA " kan.liang
2021-08-31 12:07   ` [tip: perf/core] " tip-bot2 for Kan Liang
2021-08-26 15:32 ` [PATCH 5/7] perf/x86/intel/uncore: Fix Intel SPR IIO " kan.liang
2021-08-31 12:07   ` [tip: perf/core] " tip-bot2 for Kan Liang
2021-08-26 15:32 ` [PATCH 6/7] perf/x86/intel/uncore: Fix Intel SPR M2PCIE " kan.liang
2021-08-31 12:07   ` [tip: perf/core] " tip-bot2 for Kan Liang
2021-08-26 15:32 ` [PATCH 7/7] perf/x86/intel/uncore: Fix Intel SPR M3UPI " kan.liang
2021-08-31 12:07   ` [tip: perf/core] " tip-bot2 for Kan Liang

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