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From: Dave Jiang <dave.jiang@intel.com>
To: Arnd Bergmann <arnd@kernel.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
	x86@kernel.org
Cc: Arnd Bergmann <arnd@arndb.de>, "H. Peter Anvin" <hpa@zytor.com>,
	Tony Luck <tony.luck@intel.com>,
	Dan Williams <dan.j.williams@intel.com>,
	Ben Widawsky <ben.widawsky@intel.com>,
	Ricardo Neri <ricardo.neri-calderon@linux.intel.com>,
	Arvind Sankar <nivedita@alum.mit.edu>,
	Peter Zijlstra <peterz@infradead.org>,
	Vinod Koul <vkoul@kernel.org>,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH] x86/asm: fix gcc-5 enqcmds() build failure
Date: Mon, 2 Aug 2021 08:22:46 -0700	[thread overview]
Message-ID: <196808b0-fa78-eab4-d68b-45bded788f86@intel.com> (raw)
In-Reply-To: <20210802145356.1154321-1-arnd@kernel.org>


On 8/2/2021 7:53 AM, Arnd Bergmann wrote:
> From: Arnd Bergmann <arnd@arndb.de>
>
> Building drivers/dma/idxd/submit.o with gcc-5.5 results in a cryptic
> error messages:
>
> arch/x86/include/asm/special_insns.h: Assembler messages:
> arch/x86/include/asm/special_insns.h:286: Error: operand size mismatch for `setz'
> make[5]: *** [scripts/Makefile.build:272: drivers/dma/idxd/submit.o] Error 1
>
> It seems that this happens for 32-bit arguments when the instruction
> expects an 8-bit argument. Change the type of the local variable
> accordingly to get a clean build.
>
> Fixes: 7f5933f81bd8 ("x86/asm: Add an enqcmds() wrapper for the ENQCMDS instruction")
> Fixes: 8e50d392652f ("dmaengine: idxd: Add shared workqueue support") # guessed
> Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Acked-by: Dave Jiang <dave.jiang@intel.com>

Thanks!

> ---
>   arch/x86/include/asm/special_insns.h | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/x86/include/asm/special_insns.h b/arch/x86/include/asm/special_insns.h
> index f3fbb84ff8a7..33264839f99e 100644
> --- a/arch/x86/include/asm/special_insns.h
> +++ b/arch/x86/include/asm/special_insns.h
> @@ -275,7 +275,7 @@ static inline int enqcmds(void __iomem *dst, const void *src)
>   {
>   	const struct { char _[64]; } *__src = src;
>   	struct { char _[64]; } __iomem *__dst = dst;
> -	int zf;
> +	u8 zf;
>   
>   	/*
>   	 * ENQCMDS %(rdx), rax

  reply	other threads:[~2021-08-02 15:22 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-02 14:53 Arnd Bergmann
2021-08-02 15:22 ` Dave Jiang [this message]
2021-08-02 16:15 ` H. Peter Anvin

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