LKML Archive on lore.kernel.org
help / color / mirror / Atom feed
From: Bhadram Varka <vbhadram@nvidia.com>
To: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Cc: Andrew Lunn <andrew@lunn.ch>,
	Florian Fainelli <f.fainelli@gmail.com>,
	"David S. Miller" <davem@davemloft.net>,
	"netdev@vger.kernel.org" <netdev@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	Jingju Hou <Jingju.Hou@synaptics.com>
Subject: Re: [PATCH] net: phy: marvell: clear wol event before setting it
Date: Thu, 19 Apr 2018 15:35:10 +0530	[thread overview]
Message-ID: <1c3a4b66-b10c-adc9-b7e4-57b46f5c86e5@nvidia.com> (raw)
In-Reply-To: <20180419170932.7a0b88fb@xhacker.debian>

HiJisheng,

On 4/19/2018 2:39 PM, Jisheng Zhang wrote:
> On Thu, 19 Apr 2018 09:00:40 +0000 Bhadram Varka wrote:
>
>> Hi,
>>
>>> -----Original Message-----
>>> From: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
>>> Sent: Thursday, April 19, 2018 2:24 PM
>>> To: Bhadram Varka <vbhadram@nvidia.com>
>>> Cc: Andrew Lunn <andrew@lunn.ch>; Florian Fainelli <f.fainelli@gmail.com>;
>>> David S. Miller <davem@davemloft.net>; netdev@vger.kernel.org; linux-
>>> kernel@vger.kernel.org; Jingju Hou <Jingju.Hou@synaptics.com>
>>> Subject: Re: [PATCH] net: phy: marvell: clear wol event before setting it
>>>
>>> Hi,
>>>
>>> On Thu, 19 Apr 2018 08:38:45 +0000 Bhadram Varka wrote:
>>>    
>>>> Hi,
>>>>   
>>>>> -----Original Message-----
>>>>> From: netdev-owner@vger.kernel.org <netdev-owner@vger.kernel.org> On
>>>>> Behalf Of Jisheng Zhang
>>>>> Sent: Thursday, April 19, 2018 1:33 PM
>>>>> To: Andrew Lunn <andrew@lunn.ch>; Florian Fainelli
>>>>> <f.fainelli@gmail.com>; David S. Miller <davem@davemloft.net>
>>>>> Cc: netdev@vger.kernel.org; linux-kernel@vger.kernel.org; Jingju Hou
>>>>> <Jingju.Hou@synaptics.com>
>>>>> Subject: [PATCH] net: phy: marvell: clear wol event before setting
>>>>> it
>>>>>
>>>>> From: Jingju Hou <Jingju.Hou@synaptics.com>
>>>>>
>>>>> If WOL event happened once, the LED[2] interrupt pin will not be
>>>>> cleared unless reading the CSISR register. So clear the WOL event before
>>> enabling it.
>>>>> Signed-off-by: Jingju Hou <Jingju.Hou@synaptics.com>
>>>>> Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
>>>>> ---
>>>>>   drivers/net/phy/marvell.c | 9 +++++++++
>>>>>   1 file changed, 9 insertions(+)
>>>>>
>>>>> diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c
>>>>> index c22e8e383247..b6abe1cbc84b 100644
>>>>> --- a/drivers/net/phy/marvell.c
>>>>> +++ b/drivers/net/phy/marvell.c
>>>>> @@ -115,6 +115,9 @@
>>>>>   /* WOL Event Interrupt Enable */
>>>>>   #define MII_88E1318S_PHY_CSIER_WOL_EIE			BIT(7)
>>>>>
>>>>> +/* Copper Specific Interrupt Status Register */
>>>>> +#define MII_88E1318S_PHY_CSISR				0x13
>>>>> +
>>>> There is already macro to represent this register - MII_M1011_IEVENT. Do we
>>> need this macro ?
>>>
>>> Good point. Will use MII_M1011_IEVENT instead in v2.
>>>    
>>>>   
>>>>>   /* LED Timer Control Register */
>>>>>   #define MII_88E1318S_PHY_LED_TCR			0x12
>>>>>   #define MII_88E1318S_PHY_LED_TCR_FORCE_INT		BIT(15)
>>>>> @@ -1393,6 +1396,12 @@ static int m88e1318_set_wol(struct phy_device
>>>>> *phydev,
>>>>>   		if (err < 0)
>>>>>   			goto error;
>>>>>
>>>>> +		/* If WOL event happened once, the LED[2] interrupt pin
>>>>> +		 * will not be cleared unless reading the CSISR register.
>>>>> +		 * So clear the WOL event first before enabling it.
>>>>> +		 */
>>>>> +		phy_read(phydev, MII_88E1318S_PHY_CSISR);
>>>> This part of the operation already taken care by ack_interrupt and
>>>> did_interrupt [....] .ack_interrupt = &marvell_ack_interrupt,
>>>> .did_interrupt = &m88e1121_did_interrupt, [...]
>>>>
>>>> If at all WOL event occurred marvell_ack_interrupt will take care of clearing the
>>> interrupt status register.
>>>> Am I missing anything here ?
>>> If there's no valid irq for phy, the ack_interrupt/did_interrupt won't be called.
>> Which means that the PHY is not having Interrupt pin ?
> No valid irq doesn't mean "not having interrupt pin". they are different
Okay. If there is WoL event through magic packet then its valid irq for 
the PHY right.
Then phy_interrupt will be called from there ack/did_interrupts will be 
called. So it clears WoL interrupt.
>
>> Generally through PHY interrupt will wake up the system right. If there is no interrupt pin then how the system will wake up the from suspend for the magic packet.?
>>
> IIRC, the phy irq isn't necessary for WOL. The phy interrupt pin isn't
> necessarily taken as "interrupt"
Please correct me if I am wrong. In this case how the system will wake 
up from the SC7.There has to be wake capable irq/gpio pin to do this 
operation.

Thanks,
Bhadram.

  reply	other threads:[~2018-04-19 10:05 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-04-19  8:02 Jisheng Zhang
2018-04-19  8:38 ` Bhadram Varka
2018-04-19  8:53   ` Jisheng Zhang
2018-04-19  9:00     ` Bhadram Varka
2018-04-19  9:09       ` Jisheng Zhang
2018-04-19 10:05         ` Bhadram Varka [this message]
2018-04-19 11:33           ` Andrew Lunn
2018-04-19 12:18 ` Andrew Lunn
2018-04-26  5:40   ` Bhadram Varka
2018-04-26  6:15     ` Jisheng Zhang
2018-04-26  6:26       ` Bhadram Varka
2018-04-26  7:09         ` Bhadram Varka
2018-04-27  7:25           ` Jisheng Zhang
2018-04-30 13:17             ` Andrew Lunn
2018-04-26  7:56         ` Jisheng Zhang
2018-04-26 12:40           ` Andrew Lunn
2018-04-27  3:52             ` Bhadram Varka
2018-04-27  7:23               ` Jisheng Zhang

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1c3a4b66-b10c-adc9-b7e4-57b46f5c86e5@nvidia.com \
    --to=vbhadram@nvidia.com \
    --cc=Jingju.Hou@synaptics.com \
    --cc=Jisheng.Zhang@synaptics.com \
    --cc=andrew@lunn.ch \
    --cc=davem@davemloft.net \
    --cc=f.fainelli@gmail.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=netdev@vger.kernel.org \
    --subject='Re: [PATCH] net: phy: marvell: clear wol event before setting it' \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).