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From: Marek Vasut <marek.vasut@gmail.com>
To: Radu Pirea <radu.pirea@microchip.com>,
Boris Brezillon <boris.brezillon@bootlin.com>
Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org,
Zhiqiang.Hou@nxp.com, pp@emlix.com, richard@nod.at,
computersforpeace@gmail.com, dwmw2@infradead.org
Subject: Re: [PATCH] mtd: spi-nor: add support for Microchip 25LC256
Date: Wed, 16 May 2018 00:17:57 +0200 [thread overview]
Message-ID: <1db092c8-95fb-5747-f7b9-f6a215b1aa5b@gmail.com> (raw)
In-Reply-To: <e2e23aa21b37754b0c84003e6d87c7cb7d5a17fe.camel@microchip.com>
On 05/15/2018 06:22 PM, Radu Pirea wrote:
> On Fri, 2018-05-04 at 20:40 +0200, Boris Brezillon wrote:
>> On Fri, 4 May 2018 18:54:04 +0300
>> Radu Pirea <radu.pirea@microchip.com> wrote:
>>
>>> Added geometry description for Microchip 25LC256 memory.
>>
>> Same as for the dataflash stuff you posted a few weeks ago: I don't
>> think this device belongs in the SPI NOR framework.
> Hi Boris,
>
> 25lc256 memory is similar with mr25h256, the only difference is the
> page size(64 vs 256). Because mr25h256 is already in SPI NOR framework
> I added here 25lc256.
I think I must be reading the wrong datasheet, but can you show me how
does it support things like READID opcode ?
--
Best regards,
Marek Vasut
next prev parent reply other threads:[~2018-05-15 22:18 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-05-04 15:54 Radu Pirea
2018-05-04 17:11 ` Marek Vasut
2018-05-04 18:40 ` Boris Brezillon
2018-05-15 16:22 ` Radu Pirea
2018-05-15 22:17 ` Marek Vasut [this message]
2018-05-16 10:05 ` Radu Pirea
2018-05-16 13:47 ` Marek Vasut
2018-05-18 9:50 ` Radu Pirea
2018-05-18 10:03 ` Marek Vasut
2018-05-18 13:00 ` Radu Pirea
2018-05-18 16:25 ` Marek Vasut
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