Re: atmel_spi clock polarity

[Haavard Skinnemoen <hskinnemoen@atmel.com>]

On Sat, 16 Feb 2008 22:32:52 +0900 (JST)
Atsushi Nemoto <anemo@mba.ocn.ne.jp> wrote:

> Here is my quick workaround for this problem.  It makes all CSRn.CPOL
> match for the transfer before activating chipselect.  I'm not quite
> sure my analysis is correct, and there might be better solution.
> Could you give me any comments?

I'm not sure if I fully understand what problem you're seeing. Is the
clock state wrong when the chip select is activated? If so, does the
patch below help?

Haavard

diff --git a/drivers/spi/atmel_spi.c b/drivers/spi/atmel_spi.c
index 293b7ca..4f19b82 100644
--- a/drivers/spi/atmel_spi.c
+++ b/drivers/spi/atmel_spi.c
@@ -90,6 +90,7 @@ static void cs_activate(struct atmel_spi *as, struct spi_device *spi)
 
 	mr = spi_readl(as, MR);
 	mr = SPI_BFINS(PCS, ~(1 << spi->chip_select), mr);
+	spi_writel(as, MR, mr);
 
 	dev_dbg(&spi->dev, "activate %u%s, mr %08x\n",
 			gpio, active ? " (high)" : "",
@@ -97,7 +98,6 @@ static void cs_activate(struct atmel_spi *as, struct spi_device *spi)
 
 	if (!(cpu_is_at91rm9200() && spi->chip_select == 0))
 		gpio_set_value(gpio, active);
-	spi_writel(as, MR, mr);
 }
 
 static void cs_deactivate(struct atmel_spi *as, struct spi_device *spi)