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From: Marc Pignat <marc.pignat@hevs.ch>
To: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Cc: Haavard Skinnemoen <hskinnemoen@atmel.com>,
	David Brownell <david-b@pacbell.net>,
	spi-devel-general@lists.sourceforge.net,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH] atmel_spi: support zero length transfer
Date: Wed, 20 Feb 2008 18:55:01 +0100	[thread overview]
Message-ID: <200802201855.02605.marc.pignat@hevs.ch> (raw)
In-Reply-To: <20080221.005432.07645461.anemo@mba.ocn.ne.jp>

Hi!

On Wednesday 20 February 2008, you wrote:
> A spi transfer with zero length is not invalid.  Such transfer can be
> used to achieve delay before first CLK edge after chipselect assertion.
How long will be that delay?

If they are really users of that kind of thing, this should be fixed by adding
a "delay_us_before_xfer" field in the  struct spi_transfer.

Have you tested it? I think if you start a transfer with 0 len, the ENDRX bit
will never rise, however, I'm not sure about this.

Regards

Marc

  reply	other threads:[~2008-02-20 17:55 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2008-02-20 15:54 Atsushi Nemoto
2008-02-20 17:55 ` Marc Pignat [this message]
2008-02-21  1:52   ` Atsushi Nemoto
2008-02-21  9:26     ` Marc Pignat
2008-02-21 19:23       ` David Brownell
2008-02-22  9:30         ` Marc Pignat
2008-02-22 14:15           ` Atsushi Nemoto
2008-02-22 14:28             ` [spi-devel-general] " Ned Forrester
2008-02-22 19:06               ` David Brownell
2008-02-22 19:52                 ` Ned Forrester
2008-02-22 18:58             ` David Brownell
2008-02-23  2:55           ` David Brownell
2008-02-25  8:15             ` Marc Pignat
2008-02-22 14:07         ` [spi-devel-general] " Ned Forrester
2008-02-22 19:02           ` David Brownell
2008-02-22 19:36             ` Ned Forrester
2008-02-23  2:37               ` David Brownell
2008-02-25  0:25               ` Atsushi Nemoto

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