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From: akepner@sgi.com
To: Michael Ellerman <michael@ellerman.id.au>
Cc: James Bottomley <James.Bottomley@HansenPartnership.com>,
	Grant Grundler <grundler@parisc-linux.org>,
	Tony Luck <tony.luck@intel.com>,
	Jesse Barnes <jbarnes@virtuousgeek.org>,
	Jes Sorensen <jes@sgi.com>,
	Randy Dunlap <randy.dunlap@oracle.com>,
	Roland Dreier <rdreier@cisco.com>,
	David Miller <davem@davemloft.net>,
	Benjamin Herrenschmidt <benh@kernel.crashing.org>,
	linux-kernel@vger.kernel.org, Mark Nelson <mdnelson@au1.ibm.com>
Subject: Re: [PATCH 1/3 v3] dma: document dma_{un}map_{single|sg}_attrs() interface
Date: Tue, 11 Mar 2008 18:19:54 -0700	[thread overview]
Message-ID: <20080312011954.GN12370@sgi.com> (raw)
In-Reply-To: <1204783306.14874.37.camel@concordia.ozlabs.ibm.com>


I have a new proposal for the documentation portion of this 
patchset. The code changes essentially amount to 
s/DMA_ATTR_SYNC_ON_WRITE/DMA_ATTR_BARRIER/ so thought I'd send 
just the doc change for comments now.

The description of the DMA_ATTR_BARRIER is now very short and 
generic - no particular architecture is even mentioned. I can add 
a sentence or two near the architecture-specific changes in 
arch/ia64/sn/pci/pci_dma.c about why the implementation works 
on ia64/sn, etc.

diff --git a/Documentation/DMA-attributes.txt b/Documentation/DMA-attributes.txt
index e69de29..a4106ec 100644
--- a/Documentation/DMA-attributes.txt
+++ b/Documentation/DMA-attributes.txt
@@ -0,0 +1,24 @@
+			DMA attributes
+			==============
+
+This document describes the semantics of the DMA attributes that are 
+defined in linux/dma-attrs.h. 
+
+DMA_ATTR_BARRIER
+----------------
+
+DMA_ATTR_BARRIER is a barrier attribute for DMA.  DMA to a memory 
+region with the DMA_ATTR_BARRIER attribute forces all pending DMA 
+writes to complete, and thus provides a mechanism to strictly order 
+DMA from a device across all intervening busses and bridges.  This 
+barrier is not specific to a particular type of interconnect, it 
+applies to the system as a whole, and so its implementation must 
+account for the idiosyncracies of the system all the way from the 
+DMA device to memory. 
+
+As an example of a situation where DMA_ATTR_BARRIER would be useful, 
+suppose that a device does a DMA write to indicate that data is ready 
+and available in memory.  The DMA of the "completion indication" could
+race with data DMA.  Mapping the memory used for completion indications 
+with DMA_ATTR_BARRIER would prevent the race.
+


  reply	other threads:[~2008-03-12  1:21 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2008-02-28  3:24 akepner
2008-02-29  2:45 ` Michael Ellerman
2008-02-29 18:25   ` Grant Grundler
2008-02-29 18:37     ` James Bottomley
2008-03-01  2:56       ` Benjamin Herrenschmidt
2008-03-01  3:11         ` Jesse Barnes
2008-03-01  7:18         ` Grant Grundler
2008-03-05 18:13       ` akepner
2008-03-05 19:02         ` Jesse Barnes
2008-03-06  6:01         ` Michael Ellerman
2008-03-12  1:19           ` akepner [this message]
2008-03-14  4:13             ` Grant Grundler
2008-03-14  4:30             ` Michael Ellerman
2008-03-14  5:21               ` Grant Grundler
2008-03-14 16:40                 ` Jesse Barnes
2008-03-18  1:08                 ` Michael Ellerman
2008-03-20  0:32               ` akepner
2008-02-29 21:23   ` akepner

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