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Date: Wed, 21 Jan 2015 09:17:48 +0100
From: Sascha Hauer <s.hauer@pengutronix.de>
To: Mark Rutland <mark.rutland@arm.com>
Cc: Olof Johansson <olof@lixom.net>, Arnd Bergmann <arnd@arndb.de>,
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        Eddie Huang <eddie.huang@mediatek.com>,
        Lee Jones <lee.jones@linaro.org>,
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Subject: Re: [PATCH 2/8] soc: Add MediaTek pericfg controller support
Message-ID: <20150121081748.GC12209@pengutronix.de>
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On Tue, Jan 20, 2015 at 04:15:55PM +0000, Mark Rutland wrote:
> > +
> > +	pericfg: pericfg@10003000 {
> > +		#reset-cells = <1>;
> > +		#clock-cells = <1>;
> > +		compatible = "mediatek,mt8135-pericfg";
> > +		reg = <0 0x10003000 0 0x1000>;
> > +	};
> 
> This looks identical to the infracfg (same address too). Is that
> deliberate?

Both controllers indeed control clocks and resets, but with a different
register layout, so the nodes really look identical. I'll change the
address to the real address of the MT8135 pericfg though to make the
example more realistic.

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