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From: Zidan Wang <b50113@freescale.com>
To: Nicolin Chen <nicoleotsuka@gmail.com>
Cc: Zidan Wang <zidan.wang@freescale.com>, <timur@tabi.org>,
	<Xiubo.Lee@gmail.com>, <lgirdwood@gmail.com>,
	<broonie@kernel.org>, <perex@perex.cz>, <tiwai@suse.de>,
	<alsa-devel@alsa-project.org>, <linuxppc-dev@lists.ozlabs.org>,
	<linux-kernel@vger.kernel.org>
Subject: Re: [alsa-devel][PATCH 3/3] ASoC: fsl_sai: Add support for Right-J mode
Date: Thu, 22 Jan 2015 13:13:46 +0800	[thread overview]
Message-ID: <20150122051344.GA6907@b50113> (raw)
In-Reply-To: <20150121185319.GA4238@Alpha>

On Wed, Jan 21, 2015 at 10:53:20AM -0800, Nicolin Chen wrote:
> On Tue, Jan 20, 2015 at 08:21:20PM +0800, Zidan Wang wrote:
> > Add Right-J mode and set TCR5 FBT bit to let data right justify.
> > 
> > Signed-off-by: Zidan Wang <zidan.wang@freescale.com>
> 
> > -	if (sai->is_lsb_first)
> > +	if (sai->is_lsb_first && sai->is_right_j_mode)
> >  		val_cr5 |= FSL_SAI_CR5_FBT(0);
> 
> Are you sure that FBT(0) is correct for right justified mode?
> Because the original code is using FBT(0) for the lsb_first
> situation and it shouldn't be right justified mode as default.
>
I am not sure about that. 

I assume lsb_first as big endian data.

For 16 bit data format, the 2 bytes data will in high address of 4 bytes
fifo. So the FBT is 16 for left-j and 0 for right-j. But big endian is
bytes convert not bits convert. It makes me confuse. And send to
community for help.

> Nicolin

  reply	other threads:[~2015-01-22  5:13 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-01-20 12:21 [alsa-devel][PATCH 0/3] Add master mode, tmd and right-j mode support Zidan Wang
2015-01-20 12:21 ` [alsa-devel][PATCH 1/3] SoC: fsl_sai: add sai master " Zidan Wang
2015-01-21  6:07   ` Nicolin Chen
2015-01-21  9:25     ` Zidan Wang
2015-01-21 17:36       ` Nicolin Chen
2015-01-20 12:21 ` [alsa-devel][PATCH 2/3] ASoC: fsl_sai: Add support for tdm slots operation Zidan Wang
2015-01-21 18:08   ` Nicolin Chen
2015-01-22  4:55     ` Zidan Wang
2015-01-22  5:44       ` Nicolin Chen
2015-01-22  6:20         ` Zidan Wang
2015-01-22 23:50           ` Nicolin Chen
2015-01-23  2:55             ` Zidan Wang
2015-01-23  8:27               ` Nicolin Chen
2015-01-20 12:21 ` [alsa-devel][PATCH 3/3] ASoC: fsl_sai: Add support for Right-J mode Zidan Wang
2015-01-21 18:53   ` Nicolin Chen
2015-01-22  5:13     ` Zidan Wang [this message]
2015-01-22  5:46       ` Nicolin Chen
2015-01-21  1:15 ` [alsa-devel] [PATCH 0/3] Add master mode, tmd and right-j mode support Fabio Estevam
2015-01-21  6:29   ` Nicolin Chen

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