[PATCH 1/2] ACPI / LPSS: Always disable I2C host controllers

[PATCH 1/2] ACPI / LPSS: Always disable I2C host controllers

[Mika Westerberg]

On Baytrail and Braswell the BIOS might leave the I2C host controllers
enabled, probably because it uses them for its on purposes. This is fine in
normal cases because the I2C driver will disable the hardware when it is
probed anyway.

However, in case of suspend to disk it is different story. If the driver
happens to be compiled as module the boot kernel never loads the driver
thus leaving host controllers enabled upon loading the hibernation image.

The I2C host controller interrupt mask register has default value of 0x8ff,
in other words it has most of the interrupts unmasked. When combined with
the fact that the host controller is enabled, the driver immediately starts
getting interrupts even before its resume hook is called (once IO-APIC is
resumed). Since the driver is not prepared for this it will crash the
kernel due to NULL pointer derefence because dev->msgs is NULL.

Unfortunately we were not able to get full backtrace to from the console
which could be reproduced here.

In order to fix this even when the driver is compiled as module, we disable
the I2C host controllers in byt_i2c_setup() before devices are created.

Reported-by: Yu Chen <yu.c.chen@intel.com>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
---
 drivers/acpi/acpi_lpss.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/acpi/acpi_lpss.c b/drivers/acpi/acpi_lpss.c
index e75737fd7eef..64ccc3bb0826 100644
--- a/drivers/acpi/acpi_lpss.c
+++ b/drivers/acpi/acpi_lpss.c
@@ -105,6 +105,8 @@ static void lpss_uart_setup(struct lpss_private_data *pdata)
 	}
 }
 
+#define LPSS_I2C_ENABLE			0x6c
+
 static void byt_i2c_setup(struct lpss_private_data *pdata)
 {
 	unsigned int offset;
@@ -117,6 +119,8 @@ static void byt_i2c_setup(struct lpss_private_data *pdata)
 
 	if (readl(pdata->mmio_base + pdata->dev_desc->prv_offset))
 		pdata->fixed_clk_rate = 133000000;
+
+	writel(0, pdata->mmio_base + LPSS_I2C_ENABLE);
 }
 
 static struct lpss_device_desc lpt_dev_desc = {
-- 
2.1.4

[PATCH 2/2] ACPI / LPSS: Deassert resets for SPI host controllers on Braswell

[Mika Westerberg]

On some Braswell systems BIOS leaves resets for SPI host controllers
active. This prevents the SPI driver from transferring messages on wire.

Fix this in similar way that we do for I2C already by deasserting resets
for the SPI host controllers.

Reported-by: Yang A Fang <yang.a.fang@intel.com>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
---
 drivers/acpi/acpi_lpss.c | 19 +++++++++++++++----
 1 file changed, 15 insertions(+), 4 deletions(-)

diff --git a/drivers/acpi/acpi_lpss.c b/drivers/acpi/acpi_lpss.c
index 64ccc3bb0826..7d5880ded78a 100644
--- a/drivers/acpi/acpi_lpss.c
+++ b/drivers/acpi/acpi_lpss.c
@@ -105,9 +105,7 @@ static void lpss_uart_setup(struct lpss_private_data *pdata)
 	}
 }
 
-#define LPSS_I2C_ENABLE			0x6c
-
-static void byt_i2c_setup(struct lpss_private_data *pdata)
+static void lpss_deassert_reset(struct lpss_private_data *pdata)
 {
 	unsigned int offset;
 	u32 val;
@@ -116,6 +114,13 @@ static void byt_i2c_setup(struct lpss_private_data *pdata)
 	val = readl(pdata->mmio_base + offset);
 	val |= LPSS_RESETS_RESET_APB | LPSS_RESETS_RESET_FUNC;
 	writel(val, pdata->mmio_base + offset);
+}
+
+#define LPSS_I2C_ENABLE			0x6c
+
+static void byt_i2c_setup(struct lpss_private_data *pdata)
+{
+	lpss_deassert_reset(pdata);
 
 	if (readl(pdata->mmio_base + pdata->dev_desc->prv_offset))
 		pdata->fixed_clk_rate = 133000000;
@@ -170,6 +175,12 @@ static struct lpss_device_desc byt_i2c_dev_desc = {
 	.setup = byt_i2c_setup,
 };
 
+static struct lpss_device_desc bsw_spi_dev_desc = {
+	.flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX,
+	.prv_offset = 0x400,
+	.setup = lpss_deassert_reset,
+};
+
 #else
 
 #define LPSS_ADDR(desc) (0UL)
@@ -202,7 +213,7 @@ static const struct acpi_device_id acpi_lpss_device_ids[] = {
 	/* Braswell LPSS devices */
 	{ "80862288", LPSS_ADDR(byt_pwm_dev_desc) },
 	{ "8086228A", LPSS_ADDR(byt_uart_dev_desc) },
-	{ "8086228E", LPSS_ADDR(byt_spi_dev_desc) },
+	{ "8086228E", LPSS_ADDR(bsw_spi_dev_desc) },
 	{ "808622C1", LPSS_ADDR(byt_i2c_dev_desc) },
 
 	{ "INT3430", LPSS_ADDR(lpt_dev_desc) },
-- 
2.1.4

Re: [PATCH 1/2] ACPI / LPSS: Always disable I2C host controllers

[Mika Westerberg]

On Wed, Feb 18, 2015 at 01:50:16PM +0200, Mika Westerberg wrote:
> On Baytrail and Braswell the BIOS might leave the I2C host controllers
> enabled, probably because it uses them for its on purposes. This is fine in
                                                 ^^^^^^^^^^^
As pointed out by Graham Whaley, it should say "own purposes".

Rafael, do you want me to resend this patch?

Re: [PATCH 2/2] ACPI / LPSS: Deassert resets for SPI host controllers on Braswell

[Mika Westerberg]

On Wed, Feb 18, 2015 at 05:25:09PM +0100, Rafael J. Wysocki wrote:
> On Wednesday, February 18, 2015 01:50:17 PM Mika Westerberg wrote:
> > On some Braswell systems BIOS leaves resets for SPI host controllers
> > active. This prevents the SPI driver from transferring messages on wire.
> > 
> > Fix this in similar way that we do for I2C already by deasserting resets
> > for the SPI host controllers.
> > 
> > Reported-by: Yang A Fang <yang.a.fang@intel.com>
> > Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
> 
> OK, so these two would need to go into "stable" I suppose?

Yes, if possible.

> What "stable" series we need them to go into?

Braswell support was added in v3.17 so I think from v3.17 onwards.

Re: [PATCH 1/2] ACPI / LPSS: Always disable I2C host controllers

[Rafael J. Wysocki]

On Wednesday, February 18, 2015 02:54:08 PM Mika Westerberg wrote:
> On Wed, Feb 18, 2015 at 01:50:16PM +0200, Mika Westerberg wrote:
> > On Baytrail and Braswell the BIOS might leave the I2C host controllers
> > enabled, probably because it uses them for its on purposes. This is fine in
>                                                  ^^^^^^^^^^^
> As pointed out by Graham Whaley, it should say "own purposes".
> 
> Rafael, do you want me to resend this patch?

No need if the code changes are correct, I can fix up the changelog. :-)


-- 
I speak only for myself.
Rafael J. Wysocki, Intel Open Source Technology Center.

Re: [PATCH 2/2] ACPI / LPSS: Deassert resets for SPI host controllers on Braswell

[Rafael J. Wysocki]

On Wednesday, February 18, 2015 01:50:17 PM Mika Westerberg wrote:
> On some Braswell systems BIOS leaves resets for SPI host controllers
> active. This prevents the SPI driver from transferring messages on wire.
> 
> Fix this in similar way that we do for I2C already by deasserting resets
> for the SPI host controllers.
> 
> Reported-by: Yang A Fang <yang.a.fang@intel.com>
> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>

OK, so these two would need to go into "stable" I suppose?

What "stable" series we need them to go into?

> ---
>  drivers/acpi/acpi_lpss.c | 19 +++++++++++++++----
>  1 file changed, 15 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/acpi/acpi_lpss.c b/drivers/acpi/acpi_lpss.c
> index 64ccc3bb0826..7d5880ded78a 100644
> --- a/drivers/acpi/acpi_lpss.c
> +++ b/drivers/acpi/acpi_lpss.c
> @@ -105,9 +105,7 @@ static void lpss_uart_setup(struct lpss_private_data *pdata)
>  	}
>  }
>  
> -#define LPSS_I2C_ENABLE			0x6c
> -
> -static void byt_i2c_setup(struct lpss_private_data *pdata)
> +static void lpss_deassert_reset(struct lpss_private_data *pdata)
>  {
>  	unsigned int offset;
>  	u32 val;
> @@ -116,6 +114,13 @@ static void byt_i2c_setup(struct lpss_private_data *pdata)
>  	val = readl(pdata->mmio_base + offset);
>  	val |= LPSS_RESETS_RESET_APB | LPSS_RESETS_RESET_FUNC;
>  	writel(val, pdata->mmio_base + offset);
> +}
> +
> +#define LPSS_I2C_ENABLE			0x6c
> +
> +static void byt_i2c_setup(struct lpss_private_data *pdata)
> +{
> +	lpss_deassert_reset(pdata);
>  
>  	if (readl(pdata->mmio_base + pdata->dev_desc->prv_offset))
>  		pdata->fixed_clk_rate = 133000000;
> @@ -170,6 +175,12 @@ static struct lpss_device_desc byt_i2c_dev_desc = {
>  	.setup = byt_i2c_setup,
>  };
>  
> +static struct lpss_device_desc bsw_spi_dev_desc = {
> +	.flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX,
> +	.prv_offset = 0x400,
> +	.setup = lpss_deassert_reset,
> +};
> +
>  #else
>  
>  #define LPSS_ADDR(desc) (0UL)
> @@ -202,7 +213,7 @@ static const struct acpi_device_id acpi_lpss_device_ids[] = {
>  	/* Braswell LPSS devices */
>  	{ "80862288", LPSS_ADDR(byt_pwm_dev_desc) },
>  	{ "8086228A", LPSS_ADDR(byt_uart_dev_desc) },
> -	{ "8086228E", LPSS_ADDR(byt_spi_dev_desc) },
> +	{ "8086228E", LPSS_ADDR(bsw_spi_dev_desc) },
>  	{ "808622C1", LPSS_ADDR(byt_i2c_dev_desc) },
>  
>  	{ "INT3430", LPSS_ADDR(lpt_dev_desc) },
> 

-- 
I speak only for myself.
Rafael J. Wysocki, Intel Open Source Technology Center.