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From: Bjorn Helgaas <helgaas@kernel.org>
To: David Miller <davem@davemloft.net>
Cc: khalid.aziz@oracle.com, sparclinux@vger.kernel.org,
	linux-pci@vger.kernel.org, yinghai@kernel.org,
	linux-kernel@vger.kernel.org, david.ahern@oracle.com,
	linux@iam.tj
Subject: Re: [PATCH v1 0/2] PCI: Sparc 64-bit resource fixups
Date: Mon, 19 Mar 2018 12:11:40 -0500	[thread overview]
Message-ID: <20180319171140.GA52750@bhelgaas-glaptop.roam.corp.google.com> (raw)
In-Reply-To: <20180318.120734.1936832399192758981.davem@davemloft.net>

On Sun, Mar 18, 2018 at 12:07:34PM -0400, David Miller wrote:
> From: Bjorn Helgaas <helgaas@kernel.org>
> Date: Tue, 20 Feb 2018 17:39:35 -0600
> 
> > Both these patches are on my pci/sparc branch and appeared in the
> > Feb 19 linux-next tree.
> > 
> > Any testing and feedback (especially on the second patch, which should
> > change /proc/iomem) would be great.
> > 
> > They're headed for v4.17 unless I hear about issues.
> > 
> > It would be useful to hear about what's still broken so I can try to
> > pull in the other patches.
> 
> I don't understand why you put the SYSTEM and Video ROM at addresses
> relative to absolute zero.  The result of this is that it might
> overlap real physical memory.
> 
> If a VGA card is present, it's ROM will respond to those addresses
> relative to the PCI controller's MEM space area.

I could have worded the changelog better.  This is about reserving PCI
bus addresses 0xc0000-0xc7fff, not the VGA framebuffer at
0xa0000-0xbffff.

If I understand correctly, a VGA device will respond to the
framebuffer at 0xa0000-0xbffff, but the device itself will not respond
to the 0xc0000-0xc7fff range.  I think the typical x86 PC arrangement
is that the BIOS reads the VGA option ROM using the normal relocatable
expansion ROM BAR and copies it into system memory at 0xc0000, so it
is in real physical memory.

I don't know what sparc firmware does, but I'm assuming the VGA PCI
device behaves the same in that it wouldn't respond to 0xc0000 itself.

> Their legacy resources are "hardwired", but those hardwired addresses
> need to be relative to the PCI host controller's MEM areas in order
> for them to be accessible.
> 
> I could understand removing the System ROM resource altogether, that
> makes a lot of sense to me.

Do you want me to remove the System ROM resource?  If so, I'll
make a separate patch to remove it, followed by one that does
whatever we figure out is the right thing for the video ROM.

Thanks for the feedback.

Bjorn

  reply	other threads:[~2018-03-19 17:11 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-02-15 15:17 Bjorn Helgaas
2018-02-15 15:18 ` [PATCH v1 1/2] sparc/PCI: Support arbitrary host bridge address offset Bjorn Helgaas
2018-02-15 15:18 ` [PATCH v1 2/2] sparc/PCI: Reserve System ROM and Video ROM outside of PCI space Bjorn Helgaas
2018-02-20 23:39 ` [PATCH v1 0/2] PCI: Sparc 64-bit resource fixups Bjorn Helgaas
2018-02-21 20:37   ` Khalid Aziz
2018-03-18 16:07   ` David Miller
2018-03-19 17:11     ` Bjorn Helgaas [this message]
2018-03-19 18:28       ` David Miller
2018-03-19 19:38         ` Bjorn Helgaas
2018-03-19 23:33           ` David Miller
2018-03-20 20:14             ` Bjorn Helgaas

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