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From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: Stephen Boyd <sboyd@kernel.org>
Cc: afaerber@suse.de, mark.rutland@arm.com, mturquette@baylibre.com,
robh+dt@kernel.org, liuwei@actions-semi.com,
mp-cs@actions-semi.com, 96boards@ucrobotics.com,
devicetree@vger.kernel.org, davem@davemloft.net,
mchehab@kernel.org, daniel.thompson@linaro.org,
amit.kucheria@linaro.org, viresh.kumar@linaro.org,
hzhang@ucrobotics.com, bdong@ucrobotics.com,
linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, manivannanece23@gmail.com
Subject: Re: [PATCH v5 09/12] clk: actions: Add fixed factor clock support
Date: Tue, 20 Mar 2018 14:34:00 +0530 [thread overview]
Message-ID: <20180320090400.6bgugy6fgze3ohsd@linaro.org> (raw)
In-Reply-To: <152150820384.254778.6585368643028088392@swboyd.mtv.corp.google.com>
Hi Stephen,
On Mon, Mar 19, 2018 at 06:10:03PM -0700, Stephen Boyd wrote:
> Quoting Manivannan Sadhasivam (2018-03-17 03:09:49)
> > Add support for Actions Semi fixed factor clock together with
> > helper functions to be used in composite clock.
> >
> > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> > ---
> > drivers/clk/actions/Makefile | 1 +
> > drivers/clk/actions/owl-fixed-factor.c | 81 ++++++++++++++++++++++++++++++++++
> > drivers/clk/actions/owl-fixed-factor.h | 62 ++++++++++++++++++++++++++
> > 3 files changed, 144 insertions(+)
> > create mode 100644 drivers/clk/actions/owl-fixed-factor.c
> > create mode 100644 drivers/clk/actions/owl-fixed-factor.h
> >
> > diff --git a/drivers/clk/actions/Makefile b/drivers/clk/actions/Makefile
> > index 994357fa560b..b618696ba54e 100644
> > --- a/drivers/clk/actions/Makefile
> > +++ b/drivers/clk/actions/Makefile
> > @@ -5,3 +5,4 @@ clk-owl-y += owl-gate.o
> > clk-owl-y += owl-mux.o
> > clk-owl-y += owl-divider.o
> > clk-owl-y += owl-factor.o
> > +clk-owl-y += owl-fixed-factor.o
> > diff --git a/drivers/clk/actions/owl-fixed-factor.c b/drivers/clk/actions/owl-fixed-factor.c
> > new file mode 100644
> > index 000000000000..f1281565129c
> > --- /dev/null
> > +++ b/drivers/clk/actions/owl-fixed-factor.c
> > @@ -0,0 +1,81 @@
> > +// SPDX-License-Identifier: GPL-2.0+
> > +//
> > +// OWL fixed factor clock driver
> > +//
> > +// Copyright (c) 2014 Actions Semi Inc.
> > +// Author: David Liu <liuwei@actions-semi.com>
> > +//
> > +// Copyright (c) 2018 Linaro Ltd.
> > +// Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> > +
> > +#include <linux/clk-provider.h>
> > +#include <linux/regmap.h>
> > +#include <linux/slab.h>
> > +
> > +#include "owl-fixed-factor.h"
> > +
> > +long owl_fix_fact_helper_round_rate(struct owl_clk_common *common,
> > + const struct owl_fix_fact_hw *fix_fact_hw,
> > + unsigned long rate,
> > + unsigned long *parent_rate)
> > +{
> > + if (clk_hw_get_flags(&common->hw) & CLK_SET_RATE_PARENT) {
> > + unsigned long best_parent;
> > +
> > + best_parent = (rate / fix_fact_hw->mul) * fix_fact_hw->div;
> > + *parent_rate = clk_hw_round_rate(clk_hw_get_parent(&common->hw),
> > + best_parent);
> > + }
> > +
> > + return (*parent_rate / fix_fact_hw->div) * fix_fact_hw->mul;
> > +}
> > +
> > +static long owl_fix_fact_round_rate(struct clk_hw *hw, unsigned long rate,
> > + unsigned long *parent_rate)
> > +{
> > + struct owl_fix_fact *fix_fact = hw_to_owl_fix_fact(hw);
> > + struct owl_fix_fact_hw *fix_fact_hw = &fix_fact->fix_fact_hw;
> > +
> > + return owl_fix_fact_helper_round_rate(&fix_fact->common, fix_fact_hw,
> > + rate, parent_rate);
> > +}
> > +
> > +unsigned long owl_fix_fact_helper_recalc_rate(struct owl_clk_common *common,
> > + const struct owl_fix_fact_hw *fix_fact_hw,
> > + unsigned long parent_rate)
> > +{
> > + unsigned long long int rate;
> > +
> > + rate = (unsigned long long int)parent_rate * fix_fact_hw->mul;
> > + do_div(rate, fix_fact_hw->div);
> > +
> > + return (unsigned long)rate;
>
> You can drop the cast.
>
Okay.
> > +}
> > +
> > +static unsigned long owl_fix_fact_recalc_rate(struct clk_hw *hw,
> > + unsigned long parent_rate)
> > +{
> > + struct owl_fix_fact *fix_fact = hw_to_owl_fix_fact(hw);
> > + struct owl_fix_fact_hw *fix_fact_hw = &fix_fact->fix_fact_hw;
> > +
> > + return owl_fix_fact_helper_recalc_rate(&fix_fact->common, fix_fact_hw,
> > + parent_rate);
> > +}
> > +
> > +static int owl_fix_fact_set_rate(struct clk_hw *hw, unsigned long rate,
> > + unsigned long parent_rate)
> > +{
> > + /*
> > + * We must report success but we can do so unconditionally because
> > + * clk_fix_fact_round_rate returns values that ensure this call is a
>
> What function is that?
>
It should be owl_fix_fact_round_rate.
> > + * nop.
> > + */
> > +
> > + return 0;
> > +}
> > +
> > +const struct clk_ops owl_fix_fact_ops = {
> > + .round_rate = owl_fix_fact_round_rate,
> > + .recalc_rate = owl_fix_fact_recalc_rate,
> > + .set_rate = owl_fix_fact_set_rate,
> > +};
>
> Why can't you use the regular fixed factor clk code and ops?
>
That's going to be really messy. Since I'm having the clk_hw embedded inside
owl_clk_common and using it for registering all the clocks, using generic
fixed factor functions will be a different approach _only_ for this clock and
it won't look good I guess. Also, it may become complicated with composite
clocks.
If you still want to use the generic fixed factor code, I can do that in
next revision.
Your views?
Thanks,
Mani
next prev parent reply other threads:[~2018-03-20 9:04 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-03-17 10:09 [PATCH v5 00/12] Add clock driver for Actions S900 SoC Manivannan Sadhasivam
2018-03-17 10:09 ` [PATCH v5 01/12] dt-bindings: clock: Add Actions S900 clock bindings Manivannan Sadhasivam
2018-03-20 0:59 ` Stephen Boyd
2018-03-17 10:09 ` [PATCH v5 02/12] arm64: dts: actions: Add S900 clock management unit nodes Manivannan Sadhasivam
2018-03-17 10:09 ` [PATCH v5 03/12] arm64: dts: actions: Source CMU clock for UART5 Manivannan Sadhasivam
2018-03-17 10:09 ` [PATCH v5 04/12] clk: actions: Add common clock driver support Manivannan Sadhasivam
2018-03-20 1:02 ` Stephen Boyd
2018-03-17 10:09 ` [PATCH v5 05/12] clk: actions: Add gate clock support Manivannan Sadhasivam
2018-03-20 1:04 ` Stephen Boyd
2018-03-17 10:09 ` [PATCH v5 06/12] clk: actions: Add mux " Manivannan Sadhasivam
2018-03-20 1:05 ` Stephen Boyd
2018-03-17 10:09 ` [PATCH v5 07/12] clk: actions: Add divider " Manivannan Sadhasivam
2018-03-20 1:06 ` Stephen Boyd
2018-03-17 10:09 ` [PATCH v5 08/12] clk: actions: Add factor " Manivannan Sadhasivam
2018-03-18 20:31 ` kbuild test robot
2018-03-20 1:08 ` Stephen Boyd
2018-03-20 1:11 ` Stephen Boyd
2018-03-20 1:41 ` kbuild test robot
2018-03-17 10:09 ` [PATCH v5 09/12] clk: actions: Add fixed " Manivannan Sadhasivam
2018-03-20 1:10 ` Stephen Boyd
2018-03-20 9:04 ` Manivannan Sadhasivam [this message]
2018-03-20 17:15 ` Stephen Boyd
2018-03-17 10:09 ` [PATCH v5 10/12] clk: actions: Add composite " Manivannan Sadhasivam
2018-03-17 10:09 ` [PATCH v5 11/12] clk: actions: Add pll " Manivannan Sadhasivam
2018-03-17 10:09 ` [PATCH v5 12/12] clk: actions: Add S900 SoC " Manivannan Sadhasivam
2018-03-18 20:38 ` kbuild test robot
2018-03-18 21:28 ` kbuild test robot
2018-03-20 7:16 ` Stephen Boyd
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