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From: Joerg Roedel <joro@8bytes.org>
To: Lu Baolu <baolu.lu@linux.intel.com>
Cc: David Woodhouse <dwmw2@infradead.org>,
	iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org,
	Jacob Pan <jacob.jun.pan@linux.intel.com>,
	Kevin Tian <kevin.tian@intel.com>,
	Sankaran Rajesh <rajesh.sankaran@intel.com>,
	Liu Yi L <yi.l.liu@intel.com>
Subject: Re: [PATCH 1/1] iommu/vt-d: Use real PASID for flush in caching mode
Date: Tue, 20 Mar 2018 13:43:48 -0500	[thread overview]
Message-ID: <20180320184347.h46j2wuwlj73ciag@8bytes.org> (raw)
In-Reply-To: <1521174696-22495-1-git-send-email-baolu.lu@linux.intel.com>

On Fri, Mar 16, 2018 at 12:31:36PM +0800, Lu Baolu wrote:
> If caching mode is supported, the hardware will cache
> none-present or erroneous translation entries. Hence,
> software should explicitly invalidate the PASID cache
> after a PASID table entry becomes present. We should
> issue such invalidation with the PASID value that we
> have changed. PASID 0 is not reserved for this case.
> 
> Cc: Jacob Pan <jacob.jun.pan@linux.intel.com>
> Cc: Kevin Tian <kevin.tian@intel.com>
> Cc: Sankaran Rajesh <rajesh.sankaran@intel.com>
> Suggested-by: Ashok Raj <ashok.raj@intel.com>
> Signed-off-by: Liu Yi L <yi.l.liu@intel.com>
> Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
> ---
>  drivers/iommu/intel-svm.c | 16 ++++++----------
>  1 file changed, 6 insertions(+), 10 deletions(-)

Applied, thanks.

      reply	other threads:[~2018-03-20 18:43 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-03-16  4:31 Lu Baolu
2018-03-20 18:43 ` Joerg Roedel [this message]

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