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From: Kirill Marinushkin <k.marinushkin@gmail.com>
To: Mark Brown <broonie@kernel.org>
Cc: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>,
	Jaroslav Kysela <perex@perex.cz>, Takashi Iwai <tiwai@suse.de>,
	Pan Xiuli <xiuli.pan@linux.intel.com>,
	Liam Girdwood <liam.r.girdwood@linux.intel.com>,
	linux-kernel@vger.kernel.org, alsa-devel@alsa-project.org,
	Kirill Marinushkin <k.marinushkin@gmail.com>
Subject: [PATCH v4 3/3] ASoC: topology: Add definitions for mclk_direction values
Date: Wed,  4 Apr 2018 06:19:39 +0200	[thread overview]
Message-ID: <20180404041939.23317-4-k.marinushkin@gmail.com> (raw)
In-Reply-To: <20180404041939.23317-1-k.marinushkin@gmail.com>

Current comment makes not clear the direction of mclk. Previously, similar
description caused a misunderstanding for bclk_master and fsync_master.

This commit solves the potential confusion the same way it is solved for
bclk_master and fsync_master.

Signed-off-by: Kirill Marinushkin <k.marinushkin@gmail.com>
Acked-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Cc: Jaroslav Kysela <perex@perex.cz>
Cc: Takashi Iwai <tiwai@suse.de>
Cc: Mark Brown <broonie@kernel.org>
Cc: Pan Xiuli <xiuli.pan@linux.intel.com>
Cc: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Cc: linux-kernel@vger.kernel.org
Cc: alsa-devel@alsa-project.org
---
 include/uapi/sound/asoc.h | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/include/uapi/sound/asoc.h b/include/uapi/sound/asoc.h
index f3c4b46e39d8..b901cdbe532a 100644
--- a/include/uapi/sound/asoc.h
+++ b/include/uapi/sound/asoc.h
@@ -144,6 +144,10 @@
 #define SND_SOC_TPLG_DAI_CLK_GATE_GATED	1
 #define SND_SOC_TPLG_DAI_CLK_GATE_CONT		2
 
+/* DAI mclk_direction */
+#define SND_SOC_TPLG_MCLK_CO            0 /* for codec, mclk is output */
+#define SND_SOC_TPLG_MCLK_CI            1 /* for codec, mclk is input */
+
 /* DAI physical PCM data formats.
  * Add new formats to the end of the list.
  */
@@ -334,7 +338,7 @@ struct snd_soc_tplg_hw_config {
 	__u8 invert_fsync;	/* 1 for inverted frame clock, 0 for normal */
 	__u8 bclk_master;	/* SND_SOC_TPLG_BCLK_ value */
 	__u8 fsync_master;	/* SND_SOC_TPLG_FSYNC_ value */
-	__u8 mclk_direction;    /* 0 for input, 1 for output */
+	__u8 mclk_direction;    /* SND_SOC_TPLG_MCLK_ value */
 	__le16 reserved;	/* for 32bit alignment */
 	__le32 mclk_rate;	/* MCLK or SYSCLK freqency in Hz */
 	__le32 bclk_rate;	/* BCLK freqency in Hz */
-- 
2.13.6

  parent reply	other threads:[~2018-04-04  4:19 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-04-04  4:19 [PATCH v4 0/3] ASoC: topology: Improve hw_configs Kirill Marinushkin
2018-04-04  4:19 ` [PATCH v4 1/3] ASoC: topology: Fix bclk and fsync inversion in set_link_hw_format() Kirill Marinushkin
2018-04-04  4:19 ` [PATCH v4 2/3] ASoC: topology: Add missing clock gating parameter when parsing hw_configs Kirill Marinushkin
2018-04-16 16:52   ` Mark Brown
2018-04-16 17:56     ` [PATCH] ASoC: topology: Modify clock gating parameter parsing to switch Kirill Marinushkin
2018-04-16 18:46       ` Applied "ASoC: topology: Modify clock gating parameter parsing to switch" to the asoc tree Mark Brown
2018-04-04  4:19 ` Kirill Marinushkin [this message]
2018-04-16 17:15   ` Applied "ASoC: topology: Add definitions for mclk_direction values" " Mark Brown
2018-04-04 18:57 ` [alsa-devel] [PATCH v4 0/3] ASoC: topology: Improve hw_configs Pierre-Louis Bossart

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