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From: Enric Balletbo i Serra <enric.balletbo@collabora.com> To: architt@codeaurora.org, inki.dae@samsung.com, thierry.reding@gmail.com, hjc@rock-chips.com, seanpaul@chromium.org, airlied@linux.ie, tfiga@chromium.org, heiko@sntech.de Cc: dri-devel@lists.freedesktop.org, dianders@chromium.org, a.hajda@samsung.com, kernel@collabora.com, m.szyprowski@samsung.com, linux-samsung-soc@vger.kernel.org, jy0922.shim@samsung.com, rydberg@bitmath.org, krzk@kernel.org, linux-rockchip@lists.infradead.org, kgene@kernel.org, orjan.eide@arm.com, wxt@rock-chips.com, jeffy.chen@rock-chips.com, linux-arm-kernel@lists.infradead.org, wzz@rock-chips.com, hl@rock-chips.com, jingoohan1@gmail.com, sw0312.kim@samsung.com, linux-kernel@vger.kernel.org, kyungmin.park@samsung.com, Laurent.pinchart@ideasonboard.com, kuankuan.y@gmail.com, hshi@chromium.org, "Kristian H . Kristensen" <hoegsberg@chromium.org>, Enric Balletbo i Serra <enric.balletbo@collabora.com> Subject: [RESEND PATCH v6 10/27] drm/bridge: analogix_dp: Check dpcd write/read status Date: Mon, 23 Apr 2018 12:49:46 +0200 [thread overview] Message-ID: <20180423105003.9004-11-enric.balletbo@collabora.com> (raw) In-Reply-To: <20180423105003.9004-1-enric.balletbo@collabora.com> From: Lin Huang <hl@rock-chips.com> We need to check the dpcd write/read return value to see whether the write/read was successful Cc: Kristian H. Kristensen <hoegsberg@chromium.org> Signed-off-by: Lin Huang <hl@rock-chips.com> Signed-off-by: zain wang <wzz@rock-chips.com> Signed-off-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Thierry Escande <thierry.escande@collabora.com> Reviewed-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Archit Taneja <architt@codeaurora.org> --- .../drm/bridge/analogix/analogix_dp_core.c | 169 +++++++++++++----- 1 file changed, 127 insertions(+), 42 deletions(-) diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c index 1e1743b59c77..75e61ebf6722 100644 --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c @@ -160,80 +160,137 @@ int analogix_dp_disable_psr(struct analogix_dp_device *dp) } EXPORT_SYMBOL_GPL(analogix_dp_disable_psr); -static bool analogix_dp_detect_sink_psr(struct analogix_dp_device *dp) +static int analogix_dp_detect_sink_psr(struct analogix_dp_device *dp) { unsigned char psr_version; + int ret; + + ret = drm_dp_dpcd_readb(&dp->aux, DP_PSR_SUPPORT, &psr_version); + if (ret != 1) { + dev_err(dp->dev, "failed to get PSR version, disable it\n"); + return ret; + } - drm_dp_dpcd_readb(&dp->aux, DP_PSR_SUPPORT, &psr_version); dev_dbg(dp->dev, "Panel PSR version : %x\n", psr_version); - return (psr_version & DP_PSR_IS_SUPPORTED) ? true : false; + dp->psr_enable = (psr_version & DP_PSR_IS_SUPPORTED) ? true : false; + + return 0; } -static void analogix_dp_enable_sink_psr(struct analogix_dp_device *dp) +static int analogix_dp_enable_sink_psr(struct analogix_dp_device *dp) { unsigned char psr_en; + int ret; /* Disable psr function */ - drm_dp_dpcd_readb(&dp->aux, DP_PSR_EN_CFG, &psr_en); + ret = drm_dp_dpcd_readb(&dp->aux, DP_PSR_EN_CFG, &psr_en); + if (ret != 1) { + dev_err(dp->dev, "failed to get psr config\n"); + goto end; + } + psr_en &= ~DP_PSR_ENABLE; - drm_dp_dpcd_writeb(&dp->aux, DP_PSR_EN_CFG, psr_en); + ret = drm_dp_dpcd_writeb(&dp->aux, DP_PSR_EN_CFG, psr_en); + if (ret != 1) { + dev_err(dp->dev, "failed to disable panel psr\n"); + goto end; + } /* Main-Link transmitter remains active during PSR active states */ psr_en = DP_PSR_MAIN_LINK_ACTIVE | DP_PSR_CRC_VERIFICATION; - drm_dp_dpcd_writeb(&dp->aux, DP_PSR_EN_CFG, psr_en); + ret = drm_dp_dpcd_writeb(&dp->aux, DP_PSR_EN_CFG, psr_en); + if (ret != 1) { + dev_err(dp->dev, "failed to set panel psr\n"); + goto end; + } /* Enable psr function */ psr_en = DP_PSR_ENABLE | DP_PSR_MAIN_LINK_ACTIVE | DP_PSR_CRC_VERIFICATION; - drm_dp_dpcd_writeb(&dp->aux, DP_PSR_EN_CFG, psr_en); + ret = drm_dp_dpcd_writeb(&dp->aux, DP_PSR_EN_CFG, psr_en); + if (ret != 1) { + dev_err(dp->dev, "failed to set panel psr\n"); + goto end; + } analogix_dp_enable_psr_crc(dp); + + return 0; +end: + dev_err(dp->dev, "enable psr fail, force to disable psr\n"); + dp->psr_enable = false; + + return ret; } -static void +static int analogix_dp_enable_rx_to_enhanced_mode(struct analogix_dp_device *dp, bool enable) { u8 data; + int ret; - drm_dp_dpcd_readb(&dp->aux, DP_LANE_COUNT_SET, &data); + ret = drm_dp_dpcd_readb(&dp->aux, DP_LANE_COUNT_SET, &data); + if (ret != 1) + return ret; if (enable) - drm_dp_dpcd_writeb(&dp->aux, DP_LANE_COUNT_SET, - DP_LANE_COUNT_ENHANCED_FRAME_EN | - DPCD_LANE_COUNT_SET(data)); + ret = drm_dp_dpcd_writeb(&dp->aux, DP_LANE_COUNT_SET, + DP_LANE_COUNT_ENHANCED_FRAME_EN | + DPCD_LANE_COUNT_SET(data)); else - drm_dp_dpcd_writeb(&dp->aux, DP_LANE_COUNT_SET, - DPCD_LANE_COUNT_SET(data)); + ret = drm_dp_dpcd_writeb(&dp->aux, DP_LANE_COUNT_SET, + DPCD_LANE_COUNT_SET(data)); + + return ret < 0 ? ret : 0; } -static int analogix_dp_is_enhanced_mode_available(struct analogix_dp_device *dp) +static int analogix_dp_is_enhanced_mode_available(struct analogix_dp_device *dp, + u8 *enhanced_mode_support) { u8 data; - int retval; + int ret; - drm_dp_dpcd_readb(&dp->aux, DP_MAX_LANE_COUNT, &data); - retval = DPCD_ENHANCED_FRAME_CAP(data); + ret = drm_dp_dpcd_readb(&dp->aux, DP_MAX_LANE_COUNT, &data); + if (ret != 1) { + *enhanced_mode_support = 0; + return ret; + } - return retval; + *enhanced_mode_support = DPCD_ENHANCED_FRAME_CAP(data); + + return 0; } -static void analogix_dp_set_enhanced_mode(struct analogix_dp_device *dp) +static int analogix_dp_set_enhanced_mode(struct analogix_dp_device *dp) { u8 data; + int ret; + + ret = analogix_dp_is_enhanced_mode_available(dp, &data); + if (ret < 0) + return ret; + + ret = analogix_dp_enable_rx_to_enhanced_mode(dp, data); + if (ret < 0) + return ret; - data = analogix_dp_is_enhanced_mode_available(dp); - analogix_dp_enable_rx_to_enhanced_mode(dp, data); analogix_dp_enable_enhanced_mode(dp, data); + + return 0; } -static void analogix_dp_training_pattern_dis(struct analogix_dp_device *dp) +static int analogix_dp_training_pattern_dis(struct analogix_dp_device *dp) { + int ret; + analogix_dp_set_training_pattern(dp, DP_NONE); - drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET, - DP_TRAINING_PATTERN_DISABLE); + ret = drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET, + DP_TRAINING_PATTERN_DISABLE); + + return ret < 0 ? ret : 0; } static void @@ -282,7 +339,11 @@ static int analogix_dp_link_start(struct analogix_dp_device *dp) if (retval < 0) return retval; /* set enhanced mode if available */ - analogix_dp_set_enhanced_mode(dp); + retval = analogix_dp_set_enhanced_mode(dp); + if (retval < 0) { + dev_err(dp->dev, "failed to set enhance mode\n"); + return retval; + } /* Set TX pre-emphasis to minimum */ for (lane = 0; lane < lane_count; lane++) @@ -567,10 +628,11 @@ static int analogix_dp_process_equalizer_training(struct analogix_dp_device *dp) if (!analogix_dp_channel_eq_ok(link_status, link_align, lane_count)) { /* traing pattern Set to Normal */ - analogix_dp_training_pattern_dis(dp); + retval = analogix_dp_training_pattern_dis(dp); + if (retval < 0) + return retval; dev_info(dp->dev, "Link Training success!\n"); - analogix_dp_get_link_bandwidth(dp, ®); dp->link_train.link_rate = reg; dev_dbg(dp->dev, "final bandwidth = %.2x\n", @@ -867,24 +929,32 @@ static int analogix_dp_config_video(struct analogix_dp_device *dp) return 0; } -static void analogix_dp_enable_scramble(struct analogix_dp_device *dp, - bool enable) +static int analogix_dp_enable_scramble(struct analogix_dp_device *dp, + bool enable) { u8 data; + int ret; if (enable) { analogix_dp_enable_scrambling(dp); - drm_dp_dpcd_readb(&dp->aux, DP_TRAINING_PATTERN_SET, &data); - drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET, + ret = drm_dp_dpcd_readb(&dp->aux, DP_TRAINING_PATTERN_SET, + &data); + if (ret != 1) + return ret; + ret = drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET, (u8)(data & ~DP_LINK_SCRAMBLING_DISABLE)); } else { analogix_dp_disable_scrambling(dp); - drm_dp_dpcd_readb(&dp->aux, DP_TRAINING_PATTERN_SET, &data); - drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET, + ret = drm_dp_dpcd_readb(&dp->aux, DP_TRAINING_PATTERN_SET, + &data); + if (ret != 1) + return ret; + ret = drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET, (u8)(data | DP_LINK_SCRAMBLING_DISABLE)); } + return ret < 0 ? ret : 0; } static irqreturn_t analogix_dp_hardirq(int irq, void *arg) @@ -939,23 +1009,36 @@ static int analogix_dp_commit(struct analogix_dp_device *dp) return ret; } - analogix_dp_enable_scramble(dp, 1); + ret = analogix_dp_enable_scramble(dp, 1); + if (ret < 0) { + dev_err(dp->dev, "can not enable scramble\n"); + return ret; + } analogix_dp_init_video(dp); ret = analogix_dp_config_video(dp); - if (ret) + if (ret) { dev_err(dp->dev, "unable to config video\n"); + return ret; + } /* Safe to enable the panel now */ if (dp->plat_data->panel) { - if (drm_panel_enable(dp->plat_data->panel)) + ret = drm_panel_enable(dp->plat_data->panel); + if (ret) { DRM_ERROR("failed to enable the panel\n"); + return ret; + } } - dp->psr_enable = analogix_dp_detect_sink_psr(dp); + ret = analogix_dp_detect_sink_psr(dp); + if (ret) + return ret; + if (dp->psr_enable) - analogix_dp_enable_sink_psr(dp); - return 0; + ret = analogix_dp_enable_sink_psr(dp); + + return ret; } /* @@ -1185,8 +1268,10 @@ static int analogix_dp_set_bridge(struct analogix_dp_device *dp) } ret = analogix_dp_commit(dp); - if (ret) + if (ret) { + DRM_ERROR("dp commit error, ret = %d\n", ret); goto out_dp_init; + } enable_irq(dp->irq); return 0; -- 2.17.0
next prev parent reply other threads:[~2018-04-23 10:57 UTC|newest] Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top [not found] <CGME20180423105022epcas3p442289343ea272f0722802b4746871fba@epcas3p4.samsung.com> 2018-04-23 10:49 ` [RESEND PATCH v6 00/27] DRM Rockchip rk3399 (Kevin) Enric Balletbo i Serra 2018-04-23 10:49 ` [RESEND PATCH v6 01/27] drm/bridge: analogix_dp: Move enable video into config_video() Enric Balletbo i Serra 2018-04-23 10:49 ` [RESEND PATCH v6 02/27] drm/bridge: analogix_dp: Check AUX_EN status when doing AUX transfer Enric Balletbo i Serra 2018-04-23 10:49 ` [RESEND PATCH v6 03/27] drm/bridge: analogix_dp: Don't use fast link training when panel just powered up Enric Balletbo i Serra 2018-04-23 10:49 ` [RESEND PATCH v6 04/27] drm/bridge: analogix_dp: Retry bridge enable when it failed Enric Balletbo i Serra 2018-04-23 10:49 ` [RESEND PATCH v6 05/27] drm/bridge: analogix_dp: Wait for HPD signal before configuring link Enric Balletbo i Serra 2018-04-23 10:49 ` [RESEND PATCH v6 06/27] drm/bridge: analogix_dp: Set PD_INC_BG first when powering up edp phy Enric Balletbo i Serra 2018-04-23 10:49 ` [RESEND PATCH v6 07/27] drm/bridge: analogix_dp: Ensure edp is disabled when shutting down the panel Enric Balletbo i Serra 2018-04-23 10:49 ` [RESEND PATCH v6 08/27] drm/bridge: analogix_dp: Extend hpd check time to 100ms Enric Balletbo i Serra 2018-04-23 10:49 ` [RESEND PATCH v6 09/27] drm/bridge: analogix_dp: Fix incorrect usage of enhanced mode Enric Balletbo i Serra 2018-04-23 10:49 ` Enric Balletbo i Serra [this message] 2018-04-24 13:54 ` [RESEND PATCH v6 10/27] drm/bridge: analogix_dp: Check dpcd write/read status Jingoo Han 2018-04-23 10:49 ` [RESEND PATCH v6 11/27] drm/bridge: analogix_dp: Fix AUX_PD bit for Rockchip Enric Balletbo i Serra 2018-04-24 13:57 ` Jingoo Han 2018-04-23 10:49 ` [RESEND PATCH v6 12/27] drm/bridge: analogix_dp: Reset aux channel if an error occurred Enric Balletbo i Serra 2018-04-23 10:49 ` [RESEND PATCH v6 13/27] drm/rockchip: Restore psr->state when enable/disable psr failed Enric Balletbo i Serra 2018-04-24 13:58 ` Jingoo Han 2018-04-23 10:49 ` [RESEND PATCH v6 14/27] drm/bridge: analogix_dp: Don't use ANALOGIX_DP_PLL_CTL to control pll Enric Balletbo i Serra 2018-04-24 1:25 ` Jingoo Han 2018-04-23 10:49 ` [RESEND PATCH v6 15/27] drm/bridge: analogix_dp: Fix timeout of video streamclk config Enric Balletbo i Serra 2018-04-23 10:49 ` [RESEND PATCH v6 16/27] drm/bridge: analogix_dp: Fix incorrect operations with register ANALOGIX_DP_FUNC_EN_1 Enric Balletbo i Serra 2018-04-24 1:29 ` Jingoo Han 2018-04-23 10:49 ` [RESEND PATCH v6 17/27] drm/bridge: analogix_dp: Move fast link training detect to set_bridge Enric Balletbo i Serra 2018-04-23 10:49 ` [RESEND PATCH v6 18/27] drm/bridge: analogix_dp: Reorder plat_data->power_off to happen sooner Enric Balletbo i Serra 2018-04-23 10:49 ` [RESEND PATCH v6 19/27] drm/bridge: analogix_dp: Properly log AUX CH errors Enric Balletbo i Serra 2018-04-23 10:49 ` [RESEND PATCH v6 20/27] drm/bridge: analogix_dp: Properly disable aux chan retries on rockchip Enric Balletbo i Serra 2018-04-23 10:49 ` [RESEND PATCH v6 21/27] drm/rockchip: pre dither down when output bpc is 8bit Enric Balletbo i Serra 2018-04-23 10:49 ` [RESEND PATCH v6 22/27] drm/bridge: analogix_dp: Split the platform-specific poweron in two parts Enric Balletbo i Serra 2018-04-24 14:02 ` Jingoo Han 2018-04-23 10:49 ` [RESEND PATCH v6 23/27] drm/rockchip: analogix_dp: Do not call Analogix code before bind Enric Balletbo i Serra 2018-04-23 10:50 ` [RESEND PATCH v6 24/27] drm/rockchip: psr: Avoid redundant calls to .set() callback Enric Balletbo i Serra 2018-04-23 10:50 ` [RESEND PATCH v6 25/27] drm/rockchip: psr: Sanitize semantics of allow/inhibit API Enric Balletbo i Serra 2018-04-23 10:50 ` [RESEND PATCH v6 26/27] drm/rockchip: Disallow PSR for the whole atomic commit Enric Balletbo i Serra 2018-04-23 10:50 ` [RESEND PATCH v6 27/27] drm/rockchip: psr: Remove flush by CRTC Enric Balletbo i Serra 2018-04-24 6:43 ` [RESEND PATCH v6 00/27] DRM Rockchip rk3399 (Kevin) Andrzej Hajda
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