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From: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
To: Bhadram Varka <vbhadram@nvidia.com>
Cc: Andrew Lunn <andrew@lunn.ch>,
Florian Fainelli <f.fainelli@gmail.com>,
"David S. Miller" <davem@davemloft.net>, <netdev@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
Jingju Hou <Jingju.Hou@synaptics.com>
Subject: Re: [PATCH] net: phy: marvell: clear wol event before setting it
Date: Thu, 26 Apr 2018 14:15:08 +0800 [thread overview]
Message-ID: <20180426141508.6660a633@xhacker.debian> (raw)
In-Reply-To: <4273f766-a017-b336-7d14-a28901d274b9@nvidia.com>
Hi,
On Thu, 26 Apr 2018 11:10:21 +0530 Bhadram Varka wrote:
> Hi,
>
> On 4/19/2018 5:48 PM, Andrew Lunn wrote:
> > On Thu, Apr 19, 2018 at 04:02:32PM +0800, Jisheng Zhang wrote:
> >> From: Jingju Hou <Jingju.Hou@synaptics.com>
> >>
> >> If WOL event happened once, the LED[2] interrupt pin will not be
> >> cleared unless reading the CSISR register. So clear the WOL event
> >> before enabling it.
> >>
> >> Signed-off-by: Jingju Hou <Jingju.Hou@synaptics.com>
> >> Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
> >> ---
> >> drivers/net/phy/marvell.c | 9 +++++++++
> >> 1 file changed, 9 insertions(+)
> >>
> >> diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c
> >> index c22e8e383247..b6abe1cbc84b 100644
> >> --- a/drivers/net/phy/marvell.c
> >> +++ b/drivers/net/phy/marvell.c
> >> @@ -115,6 +115,9 @@
> >> /* WOL Event Interrupt Enable */
> >> #define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7)
> >>
> >> +/* Copper Specific Interrupt Status Register */
> >> +#define MII_88E1318S_PHY_CSISR 0x13
> >> +
> >> /* LED Timer Control Register */
> >> #define MII_88E1318S_PHY_LED_TCR 0x12
> >> #define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15)
> >> @@ -1393,6 +1396,12 @@ static int m88e1318_set_wol(struct phy_device *phydev,
> >> if (err < 0)
> >> goto error;
> >>
> >> + /* If WOL event happened once, the LED[2] interrupt pin
> >> + * will not be cleared unless reading the CSISR register.
> >> + * So clear the WOL event first before enabling it.
> >> + */
> >> + phy_read(phydev, MII_88E1318S_PHY_CSISR);
> >> +
> > Hi Jisheng
> >
> > The problem with this is, you could be clearing a real interrupt, link
> > down/up etc. If interrupts are in use, i think the normal interrupt
> > handling will clear the WOL interrupt? So can you make this read
> > conditional on !phy_interrupt_is_valid()?
> So this will clear WoL interrupt bit from Copper Interrupt status register.
>
> How about clearing WoL status (Page 17, register 17) for every WOL event ?
>
This is already properly done by setting MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS
in m88e1318_set_wol()
Thanks
next prev parent reply other threads:[~2018-04-26 6:15 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-04-19 8:02 Jisheng Zhang
2018-04-19 8:38 ` Bhadram Varka
2018-04-19 8:53 ` Jisheng Zhang
2018-04-19 9:00 ` Bhadram Varka
2018-04-19 9:09 ` Jisheng Zhang
2018-04-19 10:05 ` Bhadram Varka
2018-04-19 11:33 ` Andrew Lunn
2018-04-19 12:18 ` Andrew Lunn
2018-04-26 5:40 ` Bhadram Varka
2018-04-26 6:15 ` Jisheng Zhang [this message]
2018-04-26 6:26 ` Bhadram Varka
2018-04-26 7:09 ` Bhadram Varka
2018-04-27 7:25 ` Jisheng Zhang
2018-04-30 13:17 ` Andrew Lunn
2018-04-26 7:56 ` Jisheng Zhang
2018-04-26 12:40 ` Andrew Lunn
2018-04-27 3:52 ` Bhadram Varka
2018-04-27 7:23 ` Jisheng Zhang
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