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From: Alexandre Belloni <alexandre.belloni@bootlin.com>
To: "David S . Miller" <davem@davemloft.net>
Cc: Allan Nielsen <Allan.Nielsen@microsemi.com>,
	razvan.stefanescu@nxp.com, po.liu@nxp.com,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	Andrew Lunn <andrew@lunn.ch>,
	Florian Fainelli <f.fainelli@gmail.com>,
	netdev@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-mips@linux-mips.org,
	Alexandre Belloni <alexandre.belloni@bootlin.com>,
	Rob Herring <robh+dt@kernel.org>
Subject: [PATCH net-next v2 1/7] dt-bindings: net: add DT bindings for Microsemi MIIM
Date: Thu, 26 Apr 2018 21:59:25 +0200	[thread overview]
Message-ID: <20180426195931.5393-2-alexandre.belloni@bootlin.com> (raw)
In-Reply-To: <20180426195931.5393-1-alexandre.belloni@bootlin.com>

DT bindings for the Microsemi MII Management Controller found on Microsemi
SoCs

Cc: Rob Herring <robh+dt@kernel.org>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
---
 .../devicetree/bindings/net/mscc-miim.txt     | 26 +++++++++++++++++++
 1 file changed, 26 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/net/mscc-miim.txt

diff --git a/Documentation/devicetree/bindings/net/mscc-miim.txt b/Documentation/devicetree/bindings/net/mscc-miim.txt
new file mode 100644
index 000000000000..7104679cf59d
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/mscc-miim.txt
@@ -0,0 +1,26 @@
+Microsemi MII Management Controller (MIIM) / MDIO
+=================================================
+
+Properties:
+- compatible: must be "mscc,ocelot-miim"
+- reg: The base address of the MDIO bus controller register bank. Optionally, a
+  second register bank can be defined if there is an associated reset register
+  for internal PHYs
+- #address-cells: Must be <1>.
+- #size-cells: Must be <0>.  MDIO addresses have no size component.
+- interrupts: interrupt specifier (refer to the interrupt binding)
+
+Typically an MDIO bus might have several children.
+
+Example:
+	mdio@107009c {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "mscc,ocelot-miim";
+		reg = <0x107009c 0x36>, <0x10700f0 0x8>;
+		interrupts = <14>;
+
+		phy0: ethernet-phy@0 {
+			reg = <0>;
+		};
+	};
-- 
2.17.0

  reply	other threads:[~2018-04-26 20:02 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-04-26 19:59 [PATCH net-next v2 0/7] Microsemi Ocelot Ethernet switch support Alexandre Belloni
2018-04-26 19:59 ` Alexandre Belloni [this message]
2018-04-27 20:08   ` [PATCH net-next v2 1/7] dt-bindings: net: add DT bindings for Microsemi MIIM Rob Herring
2018-04-26 19:59 ` [PATCH net-next v2 2/7] net: mscc: Add MDIO driver Alexandre Belloni
2018-04-26 20:46   ` Andrew Lunn
2018-04-26 19:59 ` [PATCH net-next v2 3/7] dt-bindings: net: add DT bindings for Microsemi Ocelot Switch Alexandre Belloni
2018-04-27 20:10   ` Rob Herring
2018-04-26 19:59 ` [PATCH net-next v2 4/7] net: mscc: Add initial Ocelot switch support Alexandre Belloni
2018-04-26 21:09   ` Andrew Lunn
2018-04-27 13:44     ` Alexandre Belloni
2018-04-28 19:42   ` kbuild test robot
2018-04-28 20:42   ` kbuild test robot
2018-04-26 19:59 ` [PATCH net-next v2 5/7] MIPS: mscc: Add switch to ocelot Alexandre Belloni
2018-04-26 20:51   ` Andrew Lunn
2018-04-27  7:40     ` Alexandre Belloni
2018-04-26 19:59 ` [PATCH net-next v2 6/7] MIPS: mscc: connect phys to ports on ocelot_pcb123 Alexandre Belloni
2018-04-26 19:59 ` [PATCH net-next v2 7/7] MAINTAINERS: Add entry for Microsemi Ethernet switches Alexandre Belloni

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