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From: Dmitry Osipenko <digetx@gmail.com>
To: Thierry Reding <thierry.reding@gmail.com>,
	Jonathan Hunter <jonathanh@nvidia.com>,
	Peter De Schrijver <pdeschrijver@nvidia.com>,
	Prashant Gaikwad <pgaikwad@nvidia.com>,
	Stephen Boyd <sboyd@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Linus Walleij <linus.walleij@linaro.org>,
	Marcel Ziswiler <marcel@ziswiler.com>,
	Marc Dietrich <marvin24@gmx.de>
Cc: linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org,
	linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH v1 4/4] ARM: dts: tegra20: Revert "Fix ULPI regression on Tegra20"
Date: Fri, 27 Apr 2018 02:58:18 +0300	[thread overview]
Message-ID: <20180426235818.10018-5-digetx@gmail.com> (raw)
In-Reply-To: <20180426235818.10018-1-digetx@gmail.com>

Commit 4c9a27a6c66d ("ARM: tegra: Fix ULPI regression on Tegra20") changed
"ulpi-link" clock from CDEV2 to PLL_P_OUT4. Turned out that PLL_P_OUT4 is
the parent of CDEV2 clock and original clock setup of "ulpi-link" was
correct. The reverted patch was fixing USB for one board and broke the
other, now Tegra's clk driver correctly sets parent for the CDEV2 clock
and hence patch could be reverted safely, restoring USB for all of the
boards.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
---
 arch/arm/boot/dts/tegra20.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index 0a7136462a1a..983dd5c14794 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -741,7 +741,7 @@
 		phy_type = "ulpi";
 		clocks = <&tegra_car TEGRA20_CLK_USB2>,
 			 <&tegra_car TEGRA20_CLK_PLL_U>,
-			 <&tegra_car TEGRA20_CLK_PLL_P_OUT4>;
+			 <&tegra_car TEGRA20_CLK_CDEV2>;
 		clock-names = "reg", "pll_u", "ulpi-link";
 		resets = <&tegra_car 58>, <&tegra_car 22>;
 		reset-names = "usb", "utmi-pads";
-- 
2.17.0

  parent reply	other threads:[~2018-04-26 23:59 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-04-26 23:58 [PATCH v1 0/4] Restore ULPI USB on Tegra20 Dmitry Osipenko
2018-04-26 23:58 ` [PATCH v1 1/4] clk: tegra20: Add DEV1/DEV2 OSC dividers Dmitry Osipenko
2018-04-27 12:33   ` Marcel Ziswiler
2018-04-27 12:54     ` Dmitry Osipenko
2018-04-27 13:00       ` Marcel Ziswiler
2018-05-03 11:59         ` Dmitry Osipenko
2018-05-03 12:02           ` Dmitry Osipenko
2018-05-03 12:30             ` Marcel Ziswiler
2018-05-03 12:35               ` Dmitry Osipenko
2018-04-30  7:48   ` Peter De Schrijver
2018-04-26 23:58 ` [PATCH v1 2/4] pinctrl: tegra20: Provide CDEV1/2 clock muxes Dmitry Osipenko
2018-04-30  7:46   ` Peter De Schrijver
2018-05-02 12:32   ` Linus Walleij
2018-04-26 23:58 ` [PATCH v1 3/4] clk: tegra20: Set correct parents for CDEV1/2 clocks Dmitry Osipenko
2018-04-30  7:46   ` Peter De Schrijver
2018-05-01 21:31   ` Stephen Boyd
2018-04-26 23:58 ` Dmitry Osipenko [this message]
2018-04-27 12:30 ` [PATCH v1 0/4] Restore ULPI USB on Tegra20 Marc Dietrich
2018-04-30  9:48 ` Thierry Reding
2018-04-30 11:28   ` Thierry Reding
2018-05-01 21:30     ` Stephen Boyd
2018-05-02 12:58     ` Linus Walleij

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