From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752293AbeD3IIn (ORCPT ); Mon, 30 Apr 2018 04:08:43 -0400 Received: from mail-wr0-f196.google.com ([209.85.128.196]:35360 "EHLO mail-wr0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751691AbeD3IIl (ORCPT ); Mon, 30 Apr 2018 04:08:41 -0400 X-Google-Smtp-Source: AB8JxZqCw00U7/IJpRQfvMRhWbWiJ5n0piQ2tARD6ZQVHUoM83bxoTLsfCrRHQhIN6xBqGxEfWgvhQ== Date: Mon, 30 Apr 2018 10:08:38 +0200 From: Thierry Reding To: Dmitry Osipenko Cc: Jonathan Hunter , Rob Herring , devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v4 11/15] memory: tegra: Add Tegra210 memory controller hot resets Message-ID: <20180430080838.GC2484@ulmo> References: <20180427093927.GK30388@ulmo> <935ad30c-1ade-3380-ad4d-f5ffbbe63a66@gmail.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="R+My9LyyhiUvIEro" Content-Disposition: inline In-Reply-To: <935ad30c-1ade-3380-ad4d-f5ffbbe63a66@gmail.com> User-Agent: Mutt/1.9.5 (2018-04-13) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --R+My9LyyhiUvIEro Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Sat, Apr 28, 2018 at 11:18:38AM +0300, Dmitry Osipenko wrote: > On 27.04.2018 12:39, Thierry Reding wrote: > > On Fri, Apr 13, 2018 at 02:33:50PM +0300, Dmitry Osipenko wrote: > >> From: Thierry Reding > >> > >> Define the table of memory controller hot resets for Tegra210. > >> > >> Signed-off-by: Thierry Reding > >> --- > >> drivers/memory/tegra/tegra210.c | 45 +++++++++++++++++++++++++++++++++ > >> 1 file changed, 45 insertions(+) > >> > >> diff --git a/drivers/memory/tegra/tegra210.c b/drivers/memory/tegra/te= gra210.c > >> index b729f49ffc8f..d00a77160407 100644 > >> --- a/drivers/memory/tegra/tegra210.c > >> +++ b/drivers/memory/tegra/tegra210.c > >> @@ -1080,6 +1080,48 @@ static const struct tegra_smmu_soc tegra210_smm= u_soc =3D { > >> .num_asids =3D 128, > >> }; > >> =20 > >> +#define TEGRA210_MC_RESET(_name, _control, _status, _bit) \ > >> + { \ > >> + .name =3D #_name, \ > >> + .id =3D TEGRA210_MC_RESET_##_name, \ > >> + .control =3D _control, \ > >> + .status =3D _status, \ > >> + .bit =3D _bit, \ > >> + } > >> + > >> +static const struct tegra_mc_reset tegra210_mc_resets[] =3D { > >> + TEGRA210_MC_RESET(AFI, 0x200, 0x204, 0), > >> + TEGRA210_MC_RESET(AVPC, 0x200, 0x204, 1), > >> + TEGRA210_MC_RESET(DC, 0x200, 0x204, 2), > >> + TEGRA210_MC_RESET(DCB, 0x200, 0x204, 3), > >> + TEGRA210_MC_RESET(HC, 0x200, 0x204, 6), > >> + TEGRA210_MC_RESET(HDA, 0x200, 0x204, 7), > >> + TEGRA210_MC_RESET(ISP2, 0x200, 0x204, 8), > >> + TEGRA210_MC_RESET(MPCORE, 0x200, 0x204, 9), > >> + TEGRA210_MC_RESET(NVENC, 0x200, 0x204, 11), > >> + TEGRA210_MC_RESET(PPCS, 0x200, 0x204, 14), > >> + TEGRA210_MC_RESET(SATA, 0x200, 0x204, 15), > >> + TEGRA210_MC_RESET(VI, 0x200, 0x204, 17), > >> + TEGRA210_MC_RESET(VIC, 0x200, 0x204, 18), > >> + TEGRA210_MC_RESET(XUSB_HOST, 0x200, 0x204, 19), > >> + TEGRA210_MC_RESET(XUSB_DEV, 0x200, 0x204, 20), > >> + TEGRA210_MC_RESET(A9AVP, 0x200, 0x204, 21), > >> + TEGRA210_MC_RESET(TSEC, 0x200, 0x204, 22), > >> + TEGRA210_MC_RESET(SDMMC1, 0x200, 0x204, 29), > >> + TEGRA210_MC_RESET(SDMMC2, 0x200, 0x204, 30), > >> + TEGRA210_MC_RESET(SDMMC3, 0x200, 0x204, 31), > >> + TEGRA210_MC_RESET(SDMMC4, 0x970, 0x974, 0), > >> + TEGRA210_MC_RESET(ISP2B, 0x970, 0x974, 1), > >> + TEGRA210_MC_RESET(GPU, 0x970, 0x974, 2), > >> + TEGRA210_MC_RESET(NVDEC, 0x970, 0x974, 5), > >> + TEGRA210_MC_RESET(APE, 0x970, 0x974, 6), > >> + TEGRA210_MC_RESET(SE, 0x970, 0x974, 7), > >> + TEGRA210_MC_RESET(NVJPG, 0x970, 0x974, 8), > >> + TEGRA210_MC_RESET(AXIAP, 0x970, 0x974, 11), > >> + TEGRA210_MC_RESET(ETR, 0x970, 0x974, 12), > >> + TEGRA210_MC_RESET(TSECB, 0x970, 0x974, 13), > >> +}; > >=20 > > Isn't this missing an include for the definitions? There is an include > > for dt-bindings/memory/tegra20-mc.h for the Tegra20 driver, but none of > > the others have it. >=20 > Those drivers already have dt-bindings included. You're right. Patch applied, thanks. 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