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From: kbuild test robot <lkp@intel.com>
To: changbin.du@intel.com
Cc: kbuild-all@01.org, yamada.masahiro@socionext.com,
	michal.lkml@markovi.net, tglx@linutronix.de, mingo@redhat.com,
	akpm@linux-foundation.org, rostedt@goodmis.org,
	rdunlap@infradead.org, x86@kernel.org, lgirdwood@gmail.com,
	broonie@kernel.org, arnd@arndb.de, linux-kbuild@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org,
	Changbin Du <changbin.du@intel.com>
Subject: Re: [PATCH v3 3/5] kernel hacking: new config NO_AUTO_INLINE to disable compiler auto-inline optimizations
Date: Sun, 6 May 2018 13:50:56 +0800	[thread overview]
Message-ID: <201805061314.Ol5vF9hV%fengguang.wu@intel.com> (raw)
In-Reply-To: <1525566016-30172-4-git-send-email-changbin.du@intel.com>

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Hi Changbin,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on linus/master]
[also build test WARNING on v4.17-rc3 next-20180504]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url:    https://github.com/0day-ci/linux/commits/changbin-du-intel-com/kernel-hacking-GCC-optimization-for-better-debug-experience-Og/20180506-110946
config: arm64-allmodconfig (attached as .config)
compiler: aarch64-linux-gnu-gcc (Debian 7.2.0-11) 7.2.0
reproduce:
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # save the attached .config to linux build tree
        make.cross ARCH=arm64 

Note: it may well be a FALSE warning. FWIW you are at least aware of it now.
http://gcc.gnu.org/wiki/Better_Uninitialized_Warnings

All warnings (new ones prefixed by >>):

   drivers/pci/host/pci-xgene.c: In function 'xgene_pcie_setup_ib_reg':
>> drivers/pci/host/pci-xgene.c:532:2: warning: 'pim_reg' may be used uninitialized in this function [-Wmaybe-uninitialized]
     xgene_pcie_setup_pims(port, pim_reg, pci_addr, ~(size - 1));
     ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
--
   drivers/scsi/ufs/ufs-qcom.c: In function 'ufs_qcom_testbus_config':
>> drivers/scsi/ufs/ufs-qcom.c:1527:6: warning: 'offset' may be used uninitialized in this function [-Wmaybe-uninitialized]
     int offset;
         ^~~~~~
>> drivers/scsi/ufs/ufs-qcom.c:1526:6: warning: 'reg' may be used uninitialized in this function [-Wmaybe-uninitialized]
     int reg;
         ^~~

vim +/pim_reg +532 drivers/pci/host/pci-xgene.c

5f6b6ccd Tanmay Inamdar 2014-10-01  484  
5f6b6ccd Tanmay Inamdar 2014-10-01  485  static void xgene_pcie_setup_ib_reg(struct xgene_pcie_port *port,
5f6b6ccd Tanmay Inamdar 2014-10-01  486  				    struct of_pci_range *range, u8 *ib_reg_mask)
5f6b6ccd Tanmay Inamdar 2014-10-01  487  {
5f6b6ccd Tanmay Inamdar 2014-10-01  488  	void __iomem *cfg_base = port->cfg_base;
d963ab22 Bjorn Helgaas  2016-10-06  489  	struct device *dev = port->dev;
5f6b6ccd Tanmay Inamdar 2014-10-01  490  	void *bar_addr;
4ecf6b0f Bjorn Helgaas  2016-10-06  491  	u32 pim_reg;
5f6b6ccd Tanmay Inamdar 2014-10-01  492  	u64 cpu_addr = range->cpu_addr;
5f6b6ccd Tanmay Inamdar 2014-10-01  493  	u64 pci_addr = range->pci_addr;
5f6b6ccd Tanmay Inamdar 2014-10-01  494  	u64 size = range->size;
5f6b6ccd Tanmay Inamdar 2014-10-01  495  	u64 mask = ~(size - 1) | EN_REG;
5f6b6ccd Tanmay Inamdar 2014-10-01  496  	u32 flags = PCI_BASE_ADDRESS_MEM_TYPE_64;
5f6b6ccd Tanmay Inamdar 2014-10-01  497  	u32 bar_low;
5f6b6ccd Tanmay Inamdar 2014-10-01  498  	int region;
5f6b6ccd Tanmay Inamdar 2014-10-01  499  
5f6b6ccd Tanmay Inamdar 2014-10-01  500  	region = xgene_pcie_select_ib_reg(ib_reg_mask, range->size);
5f6b6ccd Tanmay Inamdar 2014-10-01  501  	if (region < 0) {
d963ab22 Bjorn Helgaas  2016-10-06  502  		dev_warn(dev, "invalid pcie dma-range config\n");
5f6b6ccd Tanmay Inamdar 2014-10-01  503  		return;
5f6b6ccd Tanmay Inamdar 2014-10-01  504  	}
5f6b6ccd Tanmay Inamdar 2014-10-01  505  
5f6b6ccd Tanmay Inamdar 2014-10-01  506  	if (range->flags & IORESOURCE_PREFETCH)
5f6b6ccd Tanmay Inamdar 2014-10-01  507  		flags |= PCI_BASE_ADDRESS_MEM_PREFETCH;
5f6b6ccd Tanmay Inamdar 2014-10-01  508  
5f6b6ccd Tanmay Inamdar 2014-10-01  509  	bar_low = pcie_bar_low_val((u32)cpu_addr, flags);
5f6b6ccd Tanmay Inamdar 2014-10-01  510  	switch (region) {
5f6b6ccd Tanmay Inamdar 2014-10-01  511  	case 0:
4ecf6b0f Bjorn Helgaas  2016-10-06  512  		xgene_pcie_set_ib_mask(port, BRIDGE_CFG_4, flags, size);
5f6b6ccd Tanmay Inamdar 2014-10-01  513  		bar_addr = cfg_base + PCI_BASE_ADDRESS_0;
5f6b6ccd Tanmay Inamdar 2014-10-01  514  		writel(bar_low, bar_addr);
5f6b6ccd Tanmay Inamdar 2014-10-01  515  		writel(upper_32_bits(cpu_addr), bar_addr + 0x4);
4ecf6b0f Bjorn Helgaas  2016-10-06  516  		pim_reg = PIM1_1L;
5f6b6ccd Tanmay Inamdar 2014-10-01  517  		break;
5f6b6ccd Tanmay Inamdar 2014-10-01  518  	case 1:
8e93c513 Bjorn Helgaas  2016-10-06  519  		xgene_pcie_writel(port, IBAR2, bar_low);
8e93c513 Bjorn Helgaas  2016-10-06  520  		xgene_pcie_writel(port, IR2MSK, lower_32_bits(mask));
4ecf6b0f Bjorn Helgaas  2016-10-06  521  		pim_reg = PIM2_1L;
5f6b6ccd Tanmay Inamdar 2014-10-01  522  		break;
5f6b6ccd Tanmay Inamdar 2014-10-01  523  	case 2:
8e93c513 Bjorn Helgaas  2016-10-06  524  		xgene_pcie_writel(port, IBAR3L, bar_low);
8e93c513 Bjorn Helgaas  2016-10-06  525  		xgene_pcie_writel(port, IBAR3L + 0x4, upper_32_bits(cpu_addr));
8e93c513 Bjorn Helgaas  2016-10-06  526  		xgene_pcie_writel(port, IR3MSKL, lower_32_bits(mask));
8e93c513 Bjorn Helgaas  2016-10-06  527  		xgene_pcie_writel(port, IR3MSKL + 0x4, upper_32_bits(mask));
4ecf6b0f Bjorn Helgaas  2016-10-06  528  		pim_reg = PIM3_1L;
5f6b6ccd Tanmay Inamdar 2014-10-01  529  		break;
5f6b6ccd Tanmay Inamdar 2014-10-01  530  	}
5f6b6ccd Tanmay Inamdar 2014-10-01  531  
4ecf6b0f Bjorn Helgaas  2016-10-06 @532  	xgene_pcie_setup_pims(port, pim_reg, pci_addr, ~(size - 1));
5f6b6ccd Tanmay Inamdar 2014-10-01  533  }
5f6b6ccd Tanmay Inamdar 2014-10-01  534  

:::::: The code at line 532 was first introduced by commit
:::::: 4ecf6b0f83523fb186dd1de9e2f1d324a2a413d9 PCI: xgene: Pass struct xgene_pcie_port to setup functions

:::::: TO: Bjorn Helgaas <bhelgaas@google.com>
:::::: CC: Bjorn Helgaas <bhelgaas@google.com>

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation

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  reply	other threads:[~2018-05-06  5:51 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-06  0:20 [PATCH v3 0/5] kernel hacking: GCC optimization for better debug experience (-Og) changbin.du
2018-05-06  0:20 ` [PATCH v3 1/5] x86/mm: surround level4_kernel_pgt with #ifdef CONFIG_X86_5LEVEL...#endif changbin.du
2018-05-06  0:20 ` [PATCH v3 2/5] regulator: add dummy function of_find_regulator_by_node changbin.du
2018-05-09  8:21   ` Mark Brown
2018-05-09  8:13     ` Du, Changbin
2018-05-09  8:39       ` Mark Brown
2018-05-06  0:20 ` [PATCH v3 3/5] kernel hacking: new config NO_AUTO_INLINE to disable compiler auto-inline optimizations changbin.du
2018-05-06  5:50   ` kbuild test robot [this message]
2018-05-06  6:15   ` kbuild test robot
2018-05-06  0:20 ` [PATCH v3 4/5] kernel hacking: new config CC_OPTIMIZE_FOR_DEBUGGING to apply GCC -Og optimization changbin.du
2018-05-06  0:20 ` [PATCH v3 5/5] asm-generic: fix build error in fix_to_virt with CONFIG_CC_OPTIMIZE_FOR_DEBUGGING changbin.du

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