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* [PATCH 1/2] arm64: dts: allwinner: a64: Update Orange Pi Win/Win Plus
@ 2018-05-11  3:01 Samuel Holland
  2018-05-11  3:01 ` [PATCH 2/2] arm64: dts: allwinner: h5: Update Orange Pi Zero Plus Samuel Holland
  2018-05-11  8:37 ` [PATCH 1/2] arm64: dts: allwinner: a64: Update Orange Pi Win/Win Plus Maxime Ripard
  0 siblings, 2 replies; 3+ messages in thread
From: Samuel Holland @ 2018-05-11  3:01 UTC (permalink / raw)
  To: Maxime Ripard, Chen-Yu Tsai
  Cc: linux-arm-kernel, linux-kernel, linux-sunxi, Samuel Holland

Enable the following board hardware features:
- Gigabit Ethernet
- SDIO Wi-Fi on mmc1
- SPI flash on spi0
- Status LED
- Dual-role micro-USB connection

Also provide nodes for the UARTs exposed by the 40-pin GPIO header.

A couple of fixes were made:
- Updating a couple of regulators from the schematic
- Marking the CPU's power supply as such

Signed-off-by: Samuel Holland <samuel@sholland.org>
---
 .../boot/dts/allwinner/sun50i-a64-orangepi-win.dts | 141 ++++++++++++++++++++-
 1 file changed, 134 insertions(+), 7 deletions(-)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
index bf42690a3361..fd0636381d7f 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
@@ -1,5 +1,6 @@
 /*
  * Copyright (C) 2017 Jagan Teki <jteki@openedev.com>
+ * Copyright (C) 2017-2018 Samuel Holland <samuel@sholland.org>
  *
  * This file is dual-licensed: you can use it either under the terms
  * of the GPL or the X11 license, at your option. Note that this dual
@@ -51,23 +52,97 @@
 	compatible = "xunlong,orangepi-win", "allwinner,sun50i-a64";
 
 	aliases {
+		ethernet0 = &emac;
 		serial0 = &uart0;
+		serial1 = &uart1;
+		serial2 = &uart2;
+		serial3 = &uart3;
+		serial4 = &uart4;
 	};
 
 	chosen {
 		stdout-path = "serial0:115200n8";
 	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		status {
+			label = "orangepi:green:status";
+			gpios = <&pio 7 11 GPIO_ACTIVE_HIGH>; /* PH11 */
+		};
+	};
+
+	reg_gmac_3v3: gmac-3v3 {
+		compatible = "regulator-fixed";
+		regulator-name = "gmac-3v3";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-boot-on;
+		enable-active-high;
+		gpio = <&pio 3 14 GPIO_ACTIVE_HIGH>; /* PD14 */
+		status = "okay";
+	};
+
+	reg_usb1_vbus: usb1-vbus {
+		compatible = "regulator-fixed";
+		regulator-name = "usb1-vbus";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-boot-on;
+		enable-active-high;
+		gpio = <&pio 3 7 GPIO_ACTIVE_HIGH>; /* PD7 */
+		status = "okay";
+	};
+
+	wifi_pwrseq: wifi_pwrseq {
+		compatible = "mmc-pwrseq-simple";
+		reset-gpios = <&r_pio 0 8 GPIO_ACTIVE_LOW>; /* PL8 */
+	};
+};
+
+&cpu0 {
+	cpu-supply = <&reg_dcdc2>;
 };
 
 &ehci1 {
 	status = "okay";
 };
 
+&emac {
+	pinctrl-names = "default";
+	pinctrl-0 = <&rgmii_pins>;
+	phy-mode = "rgmii";
+	phy-handle = <&ext_rgmii_phy>;
+	phy-supply = <&reg_gmac_3v3>;
+	status = "okay";
+};
+
+&mdio {
+	ext_rgmii_phy: ethernet-phy@1 {
+		compatible = "ethernet-phy-ieee802.3-c22";
+		reg = <1>;
+	};
+};
+
 &mmc0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&mmc0_pins>;
 	vmmc-supply = <&reg_dcdc1>;
-	cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
+	cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+	disable-wp;
+	bus-width = <4>;
+	status = "okay";
+};
+
+&mmc1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&mmc1_pins>;
+	vmmc-supply = <&reg_dldo2>;
+	vqmmc-supply = <&reg_dldo4>;
+	mmc-pwrseq = <&wifi_pwrseq>;
+	bus-width = <4>;
+	non-removable;
 	status = "okay";
 };
 
@@ -89,10 +164,9 @@
 #include "axp803.dtsi"
 
 &reg_aldo1 {
-	regulator-always-on;
-	regulator-min-microvolt = <1800000>;
-	regulator-max-microvolt = <3300000>;
-	regulator-name = "afvcc-csi";
+	regulator-min-microvolt = <2800000>;
+	regulator-max-microvolt = <2800000>;
+	regulator-name = "vcc-csi";
 };
 
 &reg_aldo2 {
@@ -166,7 +240,13 @@
 &reg_eldo1 {
 	regulator-min-microvolt = <1800000>;
 	regulator-max-microvolt = <1800000>;
-	regulator-name = "cpvdd";
+	regulator-name = "vcc-pc";
+};
+
+&reg_eldo3 {
+	regulator-min-microvolt = <1500000>;
+	regulator-max-microvolt = <1800000>;
+	regulator-name = "dvdd-csi";
 };
 
 &reg_fldo1 {
@@ -191,13 +271,60 @@
 	regulator-name = "vcc-rtc";
 };
 
+&spi0 {
+	status = "okay";
+
+	spi-flash@0 {
+		compatible = "mxicy,mx25l1606e", "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <80000000>;
+		m25p,fast-read;
+		status = "okay";
+	};
+};
+
+/* On debug connector */
 &uart0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&uart0_pins_a>;
 	status = "okay";
 };
 
-&usbphy {
+/* Wi-Fi/BT */
+&uart1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
+	status = "disabled";
+};
+
+/* On Pi-2 connector, RTS/CTS optional */
+&uart2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart2_pins>;
+	status = "disabled";
+};
+
+/* On Pi-2 connector, RTS/CTS optional */
+&uart3 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart3_pins>;
+	status = "disabled";
+};
+
+/* On Pi-2 connector (labeled for SPI1), RTS/CTS optional */
+&uart4 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart4_pins>;
+	status = "disabled";
+};
+
+&usb_otg {
+	dr_mode = "otg";
 	status = "okay";
 };
 
+&usbphy {
+	usb0_id_det-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */
+	usb1_vbus-supply = <&reg_usb1_vbus>;
+	status = "okay";
+};
-- 
2.16.1

^ permalink raw reply	[flat|nested] 3+ messages in thread

* [PATCH 2/2] arm64: dts: allwinner: h5: Update Orange Pi Zero Plus
  2018-05-11  3:01 [PATCH 1/2] arm64: dts: allwinner: a64: Update Orange Pi Win/Win Plus Samuel Holland
@ 2018-05-11  3:01 ` Samuel Holland
  2018-05-11  8:37 ` [PATCH 1/2] arm64: dts: allwinner: a64: Update Orange Pi Win/Win Plus Maxime Ripard
  1 sibling, 0 replies; 3+ messages in thread
From: Samuel Holland @ 2018-05-11  3:01 UTC (permalink / raw)
  To: Maxime Ripard, Chen-Yu Tsai
  Cc: linux-arm-kernel, linux-kernel, linux-sunxi, Samuel Holland

The Orange Pi Zero Plus has an additional LED that was missing from the
device tree, and the power sequence for the SDIO Wi-Fi was missing.

The board also has UARTs 1, 2, and 3 exposed on a 26-pin GPIO header. As
the header is not populated by the manufacturer, disable the UARTs by
default.

Additionally, fix up an incorrect comment, remove an unnecessary header
inclusion, sort existing nodes, and fix some indentation issues.

Signed-off-by: Samuel Holland <samuel@sholland.org>
---
 .../dts/allwinner/sun50i-h5-orangepi-zero-plus.dts | 58 ++++++++++++++++------
 1 file changed, 42 insertions(+), 16 deletions(-)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts
index 1238de25a969..78edcb9d9167 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts
@@ -10,23 +10,18 @@
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
 
 / {
 	model = "Xunlong Orange Pi Zero Plus";
 	compatible = "xunlong,orangepi-zero-plus", "allwinner,sun50i-h5";
 
-	reg_vcc3v3: vcc3v3 {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc3v3";
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-	};
-
 	aliases {
 		ethernet0 = &emac;
 		ethernet1 = &rtl8189ftv;
 		serial0 = &uart0;
+		serial1 = &uart1;
+		serial2 = &uart2;
+		serial3 = &uart3;
 	};
 
 	chosen {
@@ -38,7 +33,7 @@
 
 		pwr {
 			label = "orangepi:green:pwr";
-			gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PA10 */
+			gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */
 			default-state = "on";
 		};
 
@@ -57,6 +52,18 @@
 		enable-active-high;
 		gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */
 	};
+
+	reg_vcc3v3: vcc3v3 {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc3v3";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+	};
+
+	wifi_pwrseq: wifi_pwrseq {
+		compatible = "mmc-pwrseq-simple";
+		reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
+	};
 };
 
 &ehci0 {
@@ -92,6 +99,7 @@
 
 &mmc1 {
 	vmmc-supply = <&reg_vcc3v3>;
+	mmc-pwrseq = <&wifi_pwrseq>;
 	bus-width = <4>;
 	non-removable;
 	status = "okay";
@@ -105,7 +113,15 @@
 	};
 };
 
-&spi0  {
+&ohci0 {
+	status = "okay";
+};
+
+&ohci1 {
+	status = "okay";
+};
+
+&spi0 {
 	status = "okay";
 
 	flash@0 {
@@ -117,18 +133,28 @@
 	};
 };
 
-&ohci0 {
+&uart0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart0_pins_a>;
 	status = "okay";
 };
 
-&ohci1 {
-	status = "okay";
+&uart1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart1_pins>;
+	status = "disabled";
 };
 
-&uart0 {
+&uart2 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&uart0_pins_a>;
-	status = "okay";
+	pinctrl-0 = <&uart2_pins>;
+	status = "disabled";
+};
+
+&uart3 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart3_pins>;
+	status = "disabled";
 };
 
 &usb_otg {
-- 
2.16.1

^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [PATCH 1/2] arm64: dts: allwinner: a64: Update Orange Pi Win/Win Plus
  2018-05-11  3:01 [PATCH 1/2] arm64: dts: allwinner: a64: Update Orange Pi Win/Win Plus Samuel Holland
  2018-05-11  3:01 ` [PATCH 2/2] arm64: dts: allwinner: h5: Update Orange Pi Zero Plus Samuel Holland
@ 2018-05-11  8:37 ` Maxime Ripard
  1 sibling, 0 replies; 3+ messages in thread
From: Maxime Ripard @ 2018-05-11  8:37 UTC (permalink / raw)
  To: Samuel Holland; +Cc: Chen-Yu Tsai, linux-arm-kernel, linux-kernel, linux-sunxi

[-- Attachment #1: Type: text/plain, Size: 839 bytes --]

Hi Samuel,

On Thu, May 10, 2018 at 10:01:23PM -0500, Samuel Holland wrote:
> Enable the following board hardware features:
> - Gigabit Ethernet
> - SDIO Wi-Fi on mmc1
> - SPI flash on spi0
> - Status LED
> - Dual-role micro-USB connection
> 
> Also provide nodes for the UARTs exposed by the 40-pin GPIO header.
> 
> A couple of fixes were made:
> - Updating a couple of regulators from the schematic
> - Marking the CPU's power supply as such

All these changes look sane, but you should really split them into
more patches to have one of these changes per patch. We really don't
mind having more patches when it's justified, and this is definitely
the case for both your patches.

Thanks!
Maxime

-- 
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]

^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2018-05-11  8:38 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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