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From: "Alastair D'Silva" <alastair@au1.ibm.com>
To: linuxppc-dev@lists.ozlabs.org
Cc: linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org,
	mikey@neuling.org, vaibhav@linux.vnet.ibm.com,
	aneesh.kumar@linux.vnet.ibm.com, malat@debian.org,
	felix@linux.vnet.ibm.com, pombredanne@nexb.com,
	sukadev@linux.vnet.ibm.com, npiggin@gmail.com,
	gregkh@linuxfoundation.org, arnd@arndb.de,
	andrew.donnellan@au1.ibm.com, fbarrat@linux.vnet.ibm.com,
	corbet@lwn.net, "Alastair D'Silva" <alastair@d-silva.org>
Subject: [PATCH v5 2/7] powerpc: Use TIDR CPU feature to control TIDR allocation
Date: Fri, 11 May 2018 16:12:58 +1000	[thread overview]
Message-ID: <20180511061303.10728-3-alastair@au1.ibm.com> (raw)
In-Reply-To: <20180511061303.10728-1-alastair@au1.ibm.com>

From: Alastair D'Silva <alastair@d-silva.org>

Switch the use of TIDR on it's CPU feature, rather than assuming it
is available based on architecture.

Signed-off-by: Alastair D'Silva <alastair@d-silva.org>
---
 arch/powerpc/kernel/process.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index 1237f13fed51..3b00da47699b 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -1154,7 +1154,7 @@ static inline void restore_sprs(struct thread_struct *old_thread,
 			mtspr(SPRN_TAR, new_thread->tar);
 	}
 
-	if (cpu_has_feature(CPU_FTR_ARCH_300) &&
+	if (cpu_has_feature(CPU_FTR_P9_TIDR) &&
 	    old_thread->tidr != new_thread->tidr)
 		mtspr(SPRN_TIDR, new_thread->tidr);
 #endif
@@ -1570,7 +1570,7 @@ void clear_thread_tidr(struct task_struct *t)
 	if (!t->thread.tidr)
 		return;
 
-	if (!cpu_has_feature(CPU_FTR_ARCH_300)) {
+	if (!cpu_has_feature(CPU_FTR_P9_TIDR)) {
 		WARN_ON_ONCE(1);
 		return;
 	}
@@ -1593,7 +1593,7 @@ int set_thread_tidr(struct task_struct *t)
 {
 	int rc;
 
-	if (!cpu_has_feature(CPU_FTR_ARCH_300))
+	if (!cpu_has_feature(CPU_FTR_P9_TIDR))
 		return -EINVAL;
 
 	if (t != current)
-- 
2.17.0

  parent reply	other threads:[~2018-05-11  6:15 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-11  6:12 [PATCH v5 0/7] ocxl: Implement Power9 as_notify/wait for OpenCAPI Alastair D'Silva
2018-05-11  6:12 ` [PATCH v5 1/7] powerpc: Add TIDR CPU feature for POWER9 Alastair D'Silva
2018-05-11  8:38   ` Frederic Barrat
2018-05-31  4:19   ` Andrew Donnellan
2018-06-04 14:10   ` [v5,1/7] " Michael Ellerman
2018-05-11  6:12 ` Alastair D'Silva [this message]
2018-05-11  8:46   ` [PATCH v5 2/7] powerpc: Use TIDR CPU feature to control TIDR allocation Frederic Barrat
2018-05-31  4:20   ` Andrew Donnellan
2018-05-11  6:12 ` [PATCH v5 3/7] powerpc: use task_pid_nr() for TID allocation Alastair D'Silva
2018-05-11  8:48   ` Frederic Barrat
2018-05-31  4:29   ` Andrew Donnellan
2018-05-11  6:13 ` [PATCH v5 4/7] ocxl: Rename pnv_ocxl_spa_remove_pe to clarify it's action Alastair D'Silva
2018-05-11  8:49   ` Frederic Barrat
2018-05-31  4:32   ` Andrew Donnellan
2018-05-11  6:13 ` [PATCH v5 5/7] ocxl: Expose the thread_id needed for wait on POWER9 Alastair D'Silva
2018-05-11  9:25   ` Frederic Barrat
2018-05-11 10:06     ` Alastair D'Silva
2018-05-11 11:03       ` Frederic Barrat
2018-05-31  4:42   ` Andrew Donnellan
2018-05-11  6:13 ` [PATCH v5 6/7] ocxl: Add an IOCTL so userspace knows what OCXL features are available Alastair D'Silva
2018-05-11  9:27   ` Frederic Barrat
2018-05-31  4:46   ` Andrew Donnellan
2018-05-11  6:13 ` [PATCH v5 7/7] ocxl: Document new OCXL IOCTLs Alastair D'Silva
2018-05-11  9:28   ` Frederic Barrat
2018-05-31  4:48   ` Andrew Donnellan

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