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From: Jeremy Linton <jeremy.linton@arm.com>
To: linux-acpi@vger.kernel.org
Cc: Sudeep.Holla@arm.com, linux-arm-kernel@lists.infradead.org,
	Lorenzo.Pieralisi@arm.com, hanjun.guo@linaro.org,
	rjw@rjwysocki.net, Will.Deacon@arm.com, Catalin.Marinas@arm.com,
	gregkh@linuxfoundation.org, Mark.Rutland@arm.com,
	linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
	wangxiongfeng2@huawei.com, vkilari@codeaurora.org,
	ahs3@redhat.com, Dietmar.Eggemann@arm.com,
	Morten.Rasmussen@arm.com, palmer@sifive.com, lenb@kernel.org,
	john.garry@huawei.com, austinwc@codeaurora.org,
	tnowicki@caviumnetworks.com, jhugo@codeaurora.org,
	ard.biesheuvel@linaro.org, Jeremy Linton <jeremy.linton@arm.com>
Subject: [PATCH v9 03/12] cacheinfo: rename of_node to fw_token
Date: Fri, 11 May 2018 18:57:58 -0500	[thread overview]
Message-ID: <20180511235807.30834-4-jeremy.linton@arm.com> (raw)
In-Reply-To: <20180511235807.30834-1-jeremy.linton@arm.com>

Rename and change the type of of_node to indicate
it is a generic pointer which is generally only used
for comparison purposes. In a later patch we will put
an ACPI/PPTT token pointer in fw_token so that
the code which builds the shared cpu masks can be reused.

Signed-off-by: Jeremy Linton <jeremy.linton@arm.com>
Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Tested-by: Vijaya Kumar K <vkilari@codeaurora.org>
Tested-by: Xiongfeng Wang <wangxiongfeng2@huawei.com>
Tested-by: Tomasz Nowicki <Tomasz.Nowicki@cavium.com>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
 drivers/base/cacheinfo.c  | 16 +++++++++-------
 include/linux/cacheinfo.h |  8 +++-----
 2 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c
index a872523e8951..597aacb233fc 100644
--- a/drivers/base/cacheinfo.c
+++ b/drivers/base/cacheinfo.c
@@ -35,7 +35,7 @@ struct cpu_cacheinfo *get_cpu_cacheinfo(unsigned int cpu)
 static inline bool cache_leaves_are_shared(struct cacheinfo *this_leaf,
 					   struct cacheinfo *sib_leaf)
 {
-	return sib_leaf->of_node == this_leaf->of_node;
+	return sib_leaf->fw_token == this_leaf->fw_token;
 }
 
 /* OF properties to query for a given cache type */
@@ -167,9 +167,10 @@ static int cache_setup_of_node(unsigned int cpu)
 	struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
 	unsigned int index = 0;
 
-	/* skip if of_node is already populated */
-	if (this_cpu_ci->info_list->of_node)
+	/* skip if fw_token is already populated */
+	if (this_cpu_ci->info_list->fw_token) {
 		return 0;
+	}
 
 	if (!cpu_dev) {
 		pr_err("No cpu device for CPU %d\n", cpu);
@@ -190,7 +191,7 @@ static int cache_setup_of_node(unsigned int cpu)
 		if (!np)
 			break;
 		cache_of_set_props(this_leaf, np);
-		this_leaf->of_node = np;
+		this_leaf->fw_token = np;
 		index++;
 	}
 
@@ -278,7 +279,7 @@ static void cache_shared_cpu_map_remove(unsigned int cpu)
 			cpumask_clear_cpu(cpu, &sib_leaf->shared_cpu_map);
 			cpumask_clear_cpu(sibling, &this_leaf->shared_cpu_map);
 		}
-		of_node_put(this_leaf->of_node);
+		of_node_put(this_leaf->fw_token);
 	}
 }
 
@@ -323,8 +324,9 @@ static int detect_cache_attributes(unsigned int cpu)
 	if (ret)
 		goto free_ci;
 	/*
-	 * For systems using DT for cache hierarchy, of_node and shared_cpu_map
-	 * will be set up here only if they are not populated already
+	 * For systems using DT for cache hierarchy, fw_token
+	 * and shared_cpu_map will be set up here only if they are
+	 * not populated already
 	 */
 	ret = cache_shared_cpu_map_setup(cpu);
 	if (ret) {
diff --git a/include/linux/cacheinfo.h b/include/linux/cacheinfo.h
index 3d9805297cda..0c6f658054d2 100644
--- a/include/linux/cacheinfo.h
+++ b/include/linux/cacheinfo.h
@@ -34,9 +34,8 @@ enum cache_type {
  * @shared_cpu_map: logical cpumask representing all the cpus sharing
  *	this cache node
  * @attributes: bitfield representing various cache attributes
- * @of_node: if devicetree is used, this represents either the cpu node in
- *	case there's no explicit cache node or the cache node itself in the
- *	device tree
+ * @fw_token: Unique value used to determine if different cacheinfo
+ *	structures represent a single hardware cache instance.
  * @disable_sysfs: indicates whether this node is visible to the user via
  *	sysfs or not
  * @priv: pointer to any private data structure specific to particular
@@ -65,8 +64,7 @@ struct cacheinfo {
 #define CACHE_ALLOCATE_POLICY_MASK	\
 	(CACHE_READ_ALLOCATE | CACHE_WRITE_ALLOCATE)
 #define CACHE_ID		BIT(4)
-
-	struct device_node *of_node;
+	void *fw_token;
 	bool disable_sysfs;
 	void *priv;
 };
-- 
2.13.6

  parent reply	other threads:[~2018-05-11 23:57 UTC|newest]

Thread overview: 56+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-11 23:57 [PATCH v9 00/12] Support PPTT for ARM64 Jeremy Linton
2018-05-11 23:57 ` [PATCH v9 01/12] drivers: base: cacheinfo: move cache_setup_of_node() Jeremy Linton
2018-05-11 23:57 ` [PATCH v9 02/12] drivers: base: cacheinfo: setup DT cache properties early Jeremy Linton
2018-05-15 17:15   ` Jeremy Linton
2018-05-15 19:32     ` Andy Shevchenko
2018-05-16 10:56       ` Sudeep Holla
2018-05-17 15:47         ` Sudeep Holla
2018-05-18 21:50           ` Andy Shevchenko
2018-05-21  9:27             ` Sudeep Holla
2018-05-21 10:15               ` Sudeep Holla
2018-05-21 10:32       ` [PATCH] drivers: base: cacheinfo: use OF property_read_u64 instead of get_property,read_number Sudeep Holla
2018-05-21 12:53         ` [PATCH v2] drivers: base: cacheinfo: use OF property_read_u32 " Sudeep Holla
2018-06-05 16:21           ` Andy Shevchenko
2018-06-05 16:26             ` Sudeep Holla
2018-06-05 16:34               ` Andy Shevchenko
2018-05-17  6:54     ` [PATCH v9 02/12] drivers: base: cacheinfo: setup DT cache properties early Greg KH
2018-05-17  9:08       ` Sudeep Holla
2018-05-17  9:35         ` Greg KH
2018-05-11 23:57 ` Jeremy Linton [this message]
2018-05-11 23:57 ` [PATCH v9 04/12] arm64/acpi: Create arch specific cpu to acpi id helper Jeremy Linton
2018-05-14 14:41   ` Sudeep Holla
2018-05-11 23:58 ` [PATCH v9 05/12] ACPI/PPTT: Add Processor Properties Topology Table parsing Jeremy Linton
2018-05-12 10:09   ` Rafael J. Wysocki
2018-05-15 21:42     ` Jeremy Linton
2018-05-16  8:24       ` Rafael J. Wysocki
2018-05-11 23:58 ` [PATCH v9 06/12] ACPI: Enable PPTT support on ARM64 Jeremy Linton
2018-05-11 23:58 ` [PATCH v9 07/12] drivers: base cacheinfo: Add support for ACPI based firmware tables Jeremy Linton
2018-05-11 23:58 ` [PATCH v9 08/12] arm64: " Jeremy Linton
2018-05-11 23:58 ` [PATCH v9 09/12] arm64: topology: rename cluster_id Jeremy Linton
2018-05-11 23:58 ` [PATCH v9 10/12] arm64: topology: enable ACPI/PPTT based CPU topology Jeremy Linton
2018-05-11 23:58 ` [PATCH v9 11/12] ACPI: Add PPTT to injectable table list Jeremy Linton
2018-05-12 10:10   ` Rafael J. Wysocki
2018-05-11 23:58 ` [PATCH v9 12/12] arm64: topology: divorce MC scheduling domain from core_siblings Jeremy Linton
2018-05-17 17:05 ` [PATCH v9 00/12] Support PPTT for ARM64 Catalin Marinas
2018-05-29 10:48   ` Geert Uytterhoeven
2018-05-29 11:14     ` Sudeep Holla
2018-05-29 11:56       ` Geert Uytterhoeven
2018-05-29 13:18         ` Sudeep Holla
2018-05-29 15:08           ` Will Deacon
2018-05-29 15:51             ` Geert Uytterhoeven
2018-05-29 17:08               ` Robin Murphy
2018-05-29 17:18                 ` Geert Uytterhoeven
2018-05-29 17:31                 ` Sudeep Holla
2018-05-29 20:16               ` Will Deacon
2018-05-29 20:48                 ` Jeremy Linton
2018-05-29 21:52               ` Jeremy Linton
2018-05-30 13:24                 ` Sudeep Holla
2018-05-29 15:23           ` Jeremy Linton
2018-05-29 15:50           ` Geert Uytterhoeven
2018-05-30  8:52             ` Morten Rasmussen
2018-06-05 13:55     ` [PATCH 1/3] Revert "arm64: topology: divorce MC scheduling domain from core_siblings" Sudeep Holla
2018-06-05 13:55       ` [PATCH 2/3] ACPI / PPTT: fix build when CONFIG_ACPI_PPTT is not enabled Sudeep Holla
2018-06-05 13:55       ` [PATCH 3/3] arm64: disable ACPI PPTT support temporarily Sudeep Holla
2018-06-05 14:09       ` [PATCH 1/3] Revert "arm64: topology: divorce MC scheduling domain from core_siblings" Geert Uytterhoeven
2018-06-05 14:12         ` Sudeep Holla
2018-06-04 15:12   ` [PATCH v9 00/12] Support PPTT for ARM64 Catalin Marinas

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