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From: Can Guo <cang@codeaurora.org>
To: subhashj@codeaurora.org, asutoshd@codeaurora.org,
	vivek.gautam@codeaurora.org, mgautam@codeaurora.org,
	kishon@ti.com, robh+dt@kernel.org, mark.rutland@arm.com
Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	Can Guo <cang@codeaurora.org>
Subject: [PATCH v6 1/3] phy: Update PHY power control sequence
Date: Tue, 29 May 2018 12:37:49 +0800	[thread overview]
Message-ID: <20180529043751.10580-2-cang@codeaurora.org> (raw)
In-Reply-To: <20180529043751.10580-1-cang@codeaurora.org>

All PHYs should be powered on before register configuration starts. And
only PCIe PHYs need an extra power control before deasserts reset state.

Signed-off-by: Can Guo <cang@codeaurora.org>
---
 drivers/phy/qualcomm/phy-qcom-qmp.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c b/drivers/phy/qualcomm/phy-qcom-qmp.c
index 97ef942..f779b0f 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp.c
@@ -982,6 +982,8 @@ static int qcom_qmp_phy_com_init(struct qcom_qmp *qmp)
 	if (cfg->has_phy_com_ctrl)
 		qphy_setbits(serdes, cfg->regs[QPHY_COM_POWER_DOWN_CONTROL],
 			     SW_PWRDN);
+	else
+		qphy_setbits(pcs, QPHY_POWER_DOWN_CONTROL, cfg->pwrdn_ctrl);
 
 	if (cfg->has_phy_dp_com_ctrl) {
 		qphy_setbits(dp_com, QPHY_V3_DP_COM_POWER_DOWN_CTRL,
@@ -1127,7 +1129,8 @@ static int qcom_qmp_phy_init(struct phy *phy)
 	 * Pull out PHY from POWER DOWN state.
 	 * This is active low enable signal to power-down PHY.
 	 */
-	qphy_setbits(pcs, QPHY_POWER_DOWN_CONTROL, cfg->pwrdn_ctrl);
+	if (cfg->type == PHY_TYPE_PCIE)
+		qphy_setbits(pcs, QPHY_POWER_DOWN_CONTROL, cfg->pwrdn_ctrl);
 
 	if (cfg->has_pwrdn_delay)
 		usleep_range(cfg->pwrdn_delay_min, cfg->pwrdn_delay_max);
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

  reply	other threads:[~2018-05-29  4:38 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-29  4:37 [PATCH v6 0/3] Support for Qualcomm UFS QMP PHY on SDM845 Can Guo
2018-05-29  4:37 ` Can Guo [this message]
2018-06-08  6:45   ` [PATCH v6 1/3] phy: Update PHY power control sequence Manu Gautam
2018-06-12  0:27     ` cang
2018-06-12 11:34   ` Vivek Gautam
2018-06-14  1:14     ` cang
2018-05-29  4:37 ` [PATCH v6 2/3] phy: Add QMP phy based UFS phy support for sdm845 Can Guo
2018-06-08  8:10   ` Vivek Gautam
2018-06-12  0:30     ` cang
2018-05-29  4:37 ` [PATCH v6 3/3] dt-bindings: phy-qcom-qmp: Add UFS phy compatible string " Can Guo

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