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From: Pavel Machek <pavel@ucw.cz>
To: "H. Nikolaus Schaller" <hns@computer.org>
Cc: Andy Shevchenko <andy.shevchenko@gmail.com>,
	Kumar Gala <galak@codeaurora.org>,
	Rob Herring <robh+dt@kernel.org>, Pawel Moll <pawel.moll@arm.com>,
	Mark Rutland <mark.rutland@arm.com>,
	Ian Campbell <ijc+devicetree@hellion.org.uk>,
	Linus Walleij <linus.walleij@linaro.org>,
	Alexandre Courbot <gnurou@gmail.com>,
	devicetree <devicetree@vger.kernel.org>,
	"open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	Discussions about the Letux Kernel <letux-kernel@openphoenux.org>,
	kernel@pyra-handheld.com
Subject: Re: [PATCH v7 3/3] gpio: pca953x: fix address calculation for pcal6524
Date: Wed, 6 Jun 2018 09:35:25 +0200	[thread overview]
Message-ID: <20180606073525.GA18743@amd> (raw)
In-Reply-To: <A639885E-0E5D-4FB0-BE51-AFF35BF4F76B@computer.org>

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On Wed 2018-06-06 07:33:32, H. Nikolaus Schaller wrote:
> Hi,
> 
> > Am 05.06.2018 um 22:39 schrieb Pavel Machek <pavel@ucw.cz>:
> > 
> > On Tue 2018-06-05 18:37:21, Andy Shevchenko wrote:
> >> On Wed, May 23, 2018 at 5:06 PM, Pavel Machek <pavel@ucw.cz> wrote:
> >>> On Thu 2018-05-17 06:59:49, H. Nikolaus Schaller wrote:
> >>>> The register constants are so far defined in a way that they fit
> >>>> for the pcal9555a when shifted by the number of banks, i.e. are
> >>>> multiplied by 2 in the accessor function.
> >>>> 
> >>>> Now, the pcal6524 has 3 banks which means the relative offset
> >>>> is multiplied by 4 for the standard registers.
> >>>> 
> >>>> Simply applying the bit shift to the extended registers gives
> >>>> a wrong result, since the base offset is already included in
> >>>> the offset.
> >>>> 
> >>>> Therefore, we have to add code to the 24 bit accessor functions
> >>>> that adjusts the register number for these exended registers.
> >>>> 
> >>>> The formula finally used was developed and proposed by
> >>>> Andy Shevchenko <andy.shevchenko@gmail.com>.
> >> 
> >>>>      int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
> >>>> +     int addr = (reg & PCAL_GPIO_MASK) << bank_shift;
> >>>> +     int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1;
> >> 
> >>> Is this reasonable to do on each register access? Compiler will not be
> >>> able to optimize out fls and shifts, right?
> >> 
> >> On modern CPUs fls() is one assembly command. OTOH, any proposal to do
> >> this better?
> >> 
> >> What I can see is that bank_shift is invariant to the function, and
> >> maybe cached.
> > 
> > Yes, I thought that caching bank_shift might be good idea. I thought
> > it was constant for given chip...
> 
> Yes, it is an f(chip), but the question that comes to my mind is if
> optimization is worth any effort. This is an accessor method over

It will also be less ugly. Copy&pasted complex exprepsion all over the
driver is not nice.
									Pavel

-- 
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html

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  reply	other threads:[~2018-06-06  7:35 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-17  4:59 [PATCH v7 0/3] pcal6524 extensions and fixes for pca953x driver H. Nikolaus Schaller
2018-05-17  4:59 ` [PATCH v7 1/3] gpio: pca953x: set the PCA_PCAL flag also when matching by DT H. Nikolaus Schaller
2018-05-23 11:46   ` Linus Walleij
2018-05-17  4:59 ` [PATCH v7 2/3] gpio: pca953x: define masks for addressing common and extended registers H. Nikolaus Schaller
2018-05-23 11:47   ` Linus Walleij
2018-05-17  4:59 ` [PATCH v7 3/3] gpio: pca953x: fix address calculation for pcal6524 H. Nikolaus Schaller
2018-05-23 11:48   ` Linus Walleij
2018-05-23 14:06   ` Pavel Machek
2018-06-05 15:37     ` Andy Shevchenko
2018-06-05 20:39       ` Pavel Machek
2018-06-06  5:33         ` H. Nikolaus Schaller
2018-06-06  7:35           ` Pavel Machek [this message]
2018-05-19 18:58 ` [PATCH v7 0/3] pcal6524 extensions and fixes for pca953x driver Andy Shevchenko

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