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From: Wolfram Sang <wsa@the-dreams.de>
To: Rob Herring <robh@kernel.org>
Cc: Chuanhua Han <chuanhua.han@nxp.com>,
	mark.rutland@arm.com, shawnguo@kernel.org,
	s.hauer@pengutronix.de, leoyang.li@nxp.com,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, linux-i2c@vger.kernel.org,
	kernel@pengutronix.de, linux-imx@nxp.com, festevam@gmail.com,
	wsa+renesas@sang-engineering.com, u.kleine-koenig@pengutronix.de,
	eha@deif.com, linux@rempel-privat.de, sumit.batra@nxp.com,
	l.stach@pengutronix.de, peda@axentia.se
Subject: Re: [PATCH 1/3] dt-bindings: i2c: add optional mul-value property to binding
Date: Tue, 7 May 2019 10:40:03 +0200	[thread overview]
Message-ID: <20190507084002.GA25688@kunai> (raw)
In-Reply-To: <20190502205901.GA24224@bogus>

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On Thu, May 02, 2019 at 03:59:01PM -0500, Rob Herring wrote:
> On Tue, Apr 30, 2019 at 12:32:40PM +0800, Chuanhua Han wrote:
> > NXP Layerscape SoC have up to three MUL options available for all
> > divider values, we choice of MUL determines the internal monitor rate
> > of the I2C bus (SCL and SDA signals):
> > A lower MUL value results in a higher sampling rate of the I2C signals.
> > A higher MUL value results in a lower sampling rate of the I2C signals.
> > 
> > So in Optional properties we added our custom mul-value property in the
> > binding to select which mul option for the device tree i2c controller
> > node.
> > 
> > Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
> > ---
> >  Documentation/devicetree/bindings/i2c/i2c-imx.txt | 3 +++
> >  1 file changed, 3 insertions(+)
> > 
> > diff --git a/Documentation/devicetree/bindings/i2c/i2c-imx.txt b/Documentation/devicetree/bindings/i2c/i2c-imx.txt
> > index b967544590e8..ba8e7b7b3fa8 100644
> > --- a/Documentation/devicetree/bindings/i2c/i2c-imx.txt
> > +++ b/Documentation/devicetree/bindings/i2c/i2c-imx.txt
> > @@ -18,6 +18,9 @@ Optional properties:
> >  - sda-gpios: specify the gpio related to SDA pin
> >  - pinctrl: add extra pinctrl to configure i2c pins to gpio function for i2c
> >    bus recovery, call it "gpio" state
> > +- mul-value: NXP Layerscape SoC have up to three MUL options available for
> > +all I2C divider values, it describes which MUL we choose to use for the driver,
> > +the values should be 1,2,4.
> 
> Needs a vendor prefix. I don't find 'value' to add anything nor do I 
> understand what MUL is.
> 
> If it is determined by SoC rather than board, then it should perhaps be 
> implied by compatible.

I was wondering the same.


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  reply	other threads:[~2019-05-07  8:40 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-04-30  4:32 Chuanhua Han
2019-04-30  4:32 ` [PATCH 2/3] i2c: imx: I2C Driver IBC and SCL Divider for MUL=2 and MUL=4 Chuanhua Han
2019-04-30  4:32 ` [PATCH 3/3] arm64: dts: fsl: ls1046a: Add mul-value property of the i2c controller nodes Chuanhua Han
2019-04-30  6:38 ` [PATCH 1/3] dt-bindings: i2c: add optional mul-value property to binding Uwe Kleine-König
2019-04-30  6:56   ` [EXT] " Chuanhua Han
2019-05-02 20:59 ` Rob Herring
2019-05-07  8:40   ` Wolfram Sang [this message]
2019-05-08 11:44   ` [EXT] " Chuanhua Han
2019-05-08 18:53     ` Leo Li

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