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From: Peter Zijlstra <peterz@infradead.org>
To: kan.liang@linux.intel.com
Cc: tglx@linutronix.de, mingo@redhat.com,
	linux-kernel@vger.kernel.org, acme@kernel.org,
	eranian@google.com, ak@linux.intel.com
Subject: Re: [RESEND PATCH 3/6] perf/x86/intel/uncore: Extract codes of box ref/unref
Date: Wed, 8 May 2019 13:51:40 +0200	[thread overview]
Message-ID: <20190508115140.GK2606@hirez.programming.kicks-ass.net> (raw)
In-Reply-To: <1556672028-119221-4-git-send-email-kan.liang@linux.intel.com>

On Tue, Apr 30, 2019 at 05:53:45PM -0700, kan.liang@linux.intel.com wrote:
> +static void uncore_box_unref(struct intel_uncore_type **types, int id)
>  {
> +	struct intel_uncore_type *type;
>  	struct intel_uncore_pmu *pmu;
>  	struct intel_uncore_box *box;
> +	int i;
> +
> +	for (; *types; types++) {
> +		type = *types;
> +		pmu = type->pmus;
> +		for (i = 0; i < type->num_boxes; i++, pmu++) {
> +			box = pmu->boxes[id];
> +			if (box && atomic_dec_return(&box->refcnt) == 0)
> +				uncore_box_exit(box);
> +		}
> +	}
> +}

> +static int uncore_box_ref(struct intel_uncore_type **types,
> +			  int id, unsigned int cpu)
>  {
> +	struct intel_uncore_type *type;
>  	struct intel_uncore_pmu *pmu;
>  	struct intel_uncore_box *box;
> +	int i, ret;
>  
> +	ret = allocate_boxes(types, id, cpu);
>  	if (ret)
>  		return ret;
>  
> @@ -1232,11 +1238,22 @@ static int uncore_event_cpu_online(unsigned int cpu)
>  		type = *types;
>  		pmu = type->pmus;
>  		for (i = 0; i < type->num_boxes; i++, pmu++) {
> +			box = pmu->boxes[id];
>  			if (box && atomic_inc_return(&box->refcnt) == 1)
>  				uncore_box_init(box);
>  		}
>  	}
> +	return 0;
> +}

This relies on all online/offline events to be globally serialized, and
they are. But that does make me wonder why we're using atomic_t.

Without the serialization there is an online-online race where the first
online sets the refcount to 1, lets the second online continue without
the first having completed the init().

Anyway, the code isn't wrong, just weird.

  reply	other threads:[~2019-05-08 11:51 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-05-01  0:53 [RESEND PATCH 0/6] Perf uncore support for Snow Ridge server kan.liang
2019-05-01  0:53 ` [RESEND PATCH 1/6] perf/x86/intel/uncore: Handle invalid event coding for free-running counter kan.liang
2019-06-17 14:36   ` [tip:perf/core] " tip-bot for Kan Liang
2019-05-01  0:53 ` [RESEND PATCH 2/6] perf/x86/intel/uncore: Add uncore support for Snow Ridge server kan.liang
2019-06-17 14:36   ` [tip:perf/core] " tip-bot for Kan Liang
2019-05-01  0:53 ` [RESEND PATCH 3/6] perf/x86/intel/uncore: Extract codes of box ref/unref kan.liang
2019-05-08 11:51   ` Peter Zijlstra [this message]
2019-06-17 14:37   ` [tip:perf/core] perf/x86/intel/uncore: Factor out box ref/unref functions tip-bot for Kan Liang
2019-05-01  0:53 ` [RESEND PATCH 4/6] perf/x86/intel/uncore: Support MMIO type uncore blocks kan.liang
2019-06-17 14:38   ` [tip:perf/core] " tip-bot for Kan Liang
2019-05-01  0:53 ` [RESEND PATCH 5/6] perf/x86/intel/uncore: Clean up client IMC kan.liang
2019-06-17 14:39   ` [tip:perf/core] " tip-bot for Kan Liang
2019-05-01  0:53 ` [RESEND PATCH 6/6] perf/x86/intel/uncore: Add IMC uncore support for Snow Ridge kan.liang
2019-06-17 14:39   ` [tip:perf/core] " tip-bot for Kan Liang
2019-05-08 11:59 ` [RESEND PATCH 0/6] Perf uncore support for Snow Ridge server Peter Zijlstra
2019-06-03 16:34 ` Peter Zijlstra
2019-06-03 17:19   ` Liang, Kan

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