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From: Changbin Du <changbin.du@gmail.com>
To: corbet@lwn.net, tglx@linutronix.de, mingo@redhat.com, bp@alien8.de
Cc: x86@kernel.org, linux-doc@vger.kernel.org,
	linux-kernel@vger.kernel.org, Changbin Du <changbin.du@gmail.com>,
	Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
Subject: [PATCH v4 09/27] Documentation: x86: convert tlb.txt to reST
Date: Wed,  8 May 2019 23:21:23 +0800	[thread overview]
Message-ID: <20190508152141.8740-10-changbin.du@gmail.com> (raw)
In-Reply-To: <20190508152141.8740-1-changbin.du@gmail.com>

This converts the plain text documentation to reStructuredText format and
add it to Sphinx TOC tree. No essential content change.

Signed-off-by: Changbin Du <changbin.du@gmail.com>
Reviewed-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
---
 Documentation/x86/index.rst            |  1 +
 Documentation/x86/{tlb.txt => tlb.rst} | 30 ++++++++++++++++----------
 2 files changed, 20 insertions(+), 11 deletions(-)
 rename Documentation/x86/{tlb.txt => tlb.rst} (81%)

diff --git a/Documentation/x86/index.rst b/Documentation/x86/index.rst
index e43aa9b31976..c4ea25350221 100644
--- a/Documentation/x86/index.rst
+++ b/Documentation/x86/index.rst
@@ -15,3 +15,4 @@ x86-specific Documentation
    entry_64
    earlyprintk
    zero-page
+   tlb
diff --git a/Documentation/x86/tlb.txt b/Documentation/x86/tlb.rst
similarity index 81%
rename from Documentation/x86/tlb.txt
rename to Documentation/x86/tlb.rst
index 6a0607b99ed8..82ec58ae63a8 100644
--- a/Documentation/x86/tlb.txt
+++ b/Documentation/x86/tlb.rst
@@ -1,5 +1,12 @@
+.. SPDX-License-Identifier: GPL-2.0
+
+=======
+The TLB
+=======
+
 When the kernel unmaps or modified the attributes of a range of
 memory, it has two choices:
+
  1. Flush the entire TLB with a two-instruction sequence.  This is
     a quick operation, but it causes collateral damage: TLB entries
     from areas other than the one we are trying to flush will be
@@ -10,6 +17,7 @@ memory, it has two choices:
     damage to other TLB entries.
 
 Which method to do depends on a few things:
+
  1. The size of the flush being performed.  A flush of the entire
     address space is obviously better performed by flushing the
     entire TLB than doing 2^48/PAGE_SIZE individual flushes.
@@ -33,7 +41,7 @@ well.  There is essentially no "right" point to choose.
 You may be doing too many individual invalidations if you see the
 invlpg instruction (or instructions _near_ it) show up high in
 profiles.  If you believe that individual invalidations being
-called too often, you can lower the tunable:
+called too often, you can lower the tunable::
 
 	/sys/kernel/debug/x86/tlb_single_page_flush_ceiling
 
@@ -43,7 +51,7 @@ Setting it to 1 is a very conservative setting and it should
 never need to be 0 under normal circumstances.
 
 Despite the fact that a single individual flush on x86 is
-guaranteed to flush a full 2MB [1], hugetlbfs always uses the full
+guaranteed to flush a full 2MB [1]_, hugetlbfs always uses the full
 flushes.  THP is treated exactly the same as normal memory.
 
 You might see invlpg inside of flush_tlb_mm_range() show up in
@@ -54,15 +62,15 @@ Essentially, you are balancing the cycles you spend doing invlpg
 with the cycles that you spend refilling the TLB later.
 
 You can measure how expensive TLB refills are by using
-performance counters and 'perf stat', like this:
+performance counters and 'perf stat', like this::
 
-perf stat -e
-	cpu/event=0x8,umask=0x84,name=dtlb_load_misses_walk_duration/,
-	cpu/event=0x8,umask=0x82,name=dtlb_load_misses_walk_completed/,
-	cpu/event=0x49,umask=0x4,name=dtlb_store_misses_walk_duration/,
-	cpu/event=0x49,umask=0x2,name=dtlb_store_misses_walk_completed/,
-	cpu/event=0x85,umask=0x4,name=itlb_misses_walk_duration/,
-	cpu/event=0x85,umask=0x2,name=itlb_misses_walk_completed/
+  perf stat -e
+    cpu/event=0x8,umask=0x84,name=dtlb_load_misses_walk_duration/,
+    cpu/event=0x8,umask=0x82,name=dtlb_load_misses_walk_completed/,
+    cpu/event=0x49,umask=0x4,name=dtlb_store_misses_walk_duration/,
+    cpu/event=0x49,umask=0x2,name=dtlb_store_misses_walk_completed/,
+    cpu/event=0x85,umask=0x4,name=itlb_misses_walk_duration/,
+    cpu/event=0x85,umask=0x2,name=itlb_misses_walk_completed/
 
 That works on an IvyBridge-era CPU (i5-3320M).  Different CPUs
 may have differently-named counters, but they should at least
@@ -70,6 +78,6 @@ be there in some form.  You can use pmu-tools 'ocperf list'
 (https://github.com/andikleen/pmu-tools) to find the right
 counters for a given CPU.
 
-1. A footnote in Intel's SDM "4.10.4.2 Recommended Invalidation"
+.. [1] A footnote in Intel's SDM "4.10.4.2 Recommended Invalidation"
    says: "One execution of INVLPG is sufficient even for a page
    with size greater than 4 KBytes."
-- 
2.20.1


  parent reply	other threads:[~2019-05-08 15:23 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-05-08 15:21 [PATCH v4 00/27] Include linux x86 docs into Sphinx TOC tree Changbin Du
2019-05-08 15:21 ` [PATCH v4 01/27] Documentation: add Linux x86 docs to " Changbin Du
2019-05-08 15:21 ` [PATCH v4 02/27] Documentation: x86: convert boot.txt to reST Changbin Du
2019-05-08 15:21 ` [PATCH v4 03/27] Documentation: x86: convert topology.txt " Changbin Du
2019-05-08 15:21 ` [PATCH v4 04/27] Documentation: x86: convert exception-tables.txt " Changbin Du
2019-05-08 15:21 ` [PATCH v4 05/27] Documentation: x86: convert kernel-stacks " Changbin Du
2019-05-08 15:21 ` [PATCH v4 06/27] Documentation: x86: convert entry_64.txt " Changbin Du
2019-05-08 15:21 ` [PATCH v4 07/27] Documentation: x86: convert earlyprintk.txt " Changbin Du
2019-05-08 15:21 ` [PATCH v4 08/27] Documentation: x86: convert zero-page.txt " Changbin Du
2019-05-08 15:21 ` Changbin Du [this message]
2019-05-08 15:21 ` [PATCH v4 10/27] Documentation: x86: convert mtrr.txt " Changbin Du
2019-05-08 15:21 ` [PATCH v4 11/27] Documentation: x86: convert pat.txt " Changbin Du
2019-05-08 15:21 ` [PATCH v4 12/27] Documentation: x86: convert protection-keys.txt " Changbin Du
2019-05-08 15:21 ` [PATCH v4 13/27] Documentation: x86: convert intel_mpx.txt " Changbin Du
2019-05-08 15:21 ` [PATCH v4 14/27] Documentation: x86: convert amd-memory-encryption.txt " Changbin Du
2019-05-08 15:21 ` [PATCH v4 15/27] Documentation: x86: convert pti.txt " Changbin Du
2019-05-08 15:21 ` [PATCH v4 16/27] Documentation: x86: convert microcode.txt " Changbin Du
2019-05-08 15:21 ` [PATCH v4 17/27] Documentation: x86: convert resctrl_ui.txt " Changbin Du
2019-05-08 15:21 ` [PATCH v4 18/27] Documentation: x86: convert orc-unwinder.txt " Changbin Du
2019-05-08 15:21 ` [PATCH v4 19/27] Documentation: x86: convert usb-legacy-support.txt " Changbin Du
2019-05-08 15:21 ` [PATCH v4 20/27] Documentation: x86: convert i386/IO-APIC.txt " Changbin Du
2019-05-08 15:21 ` [PATCH v4 21/27] Documentation: x86: convert x86_64/boot-options.txt " Changbin Du
2019-05-08 15:21 ` [PATCH v4 22/27] Documentation: x86: convert x86_64/uefi.txt " Changbin Du
2019-05-08 15:21 ` [PATCH v4 23/27] Documentation: x86: convert x86_64/mm.txt " Changbin Du
2019-05-08 15:21 ` [PATCH v4 24/27] Documentation: x86: convert x86_64/5level-paging.txt " Changbin Du
2019-05-08 15:21 ` [PATCH v4 25/27] Documentation: x86: convert x86_64/fake-numa-for-cpusets " Changbin Du
2019-05-08 15:21 ` [PATCH v4 26/27] Documentation: x86: convert x86_64/cpu-hotplug-spec " Changbin Du
2019-05-08 15:21 ` [PATCH v4 27/27] Documentation: x86: convert x86_64/machinecheck " Changbin Du
2019-05-08 20:40 ` [PATCH v4 00/27] Include linux x86 docs into Sphinx TOC tree Jonathan Corbet

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