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From: Atish Patra <atish.patra@wdc.com>
To: linux-kernel@vger.kernel.org
Cc: Atish Patra <atish.patra@wdc.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Andreas Schwab <schwab@suse.de>, Anup Patel <anup@brainfault.org>,
Catalin Marinas <catalin.marinas@arm.com>,
devicetree@vger.kernel.org,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Ingo Molnar <mingo@kernel.org>,
Jeremy Linton <jeremy.linton@arm.com>,
linux-riscv@lists.infradead.org,
Mark Rutland <mark.rutland@arm.com>,
Morten Rasmussen <morten.rasmussen@arm.com>,
Otto Sabart <ottosabart@seberm.com>,
Palmer Dabbelt <palmer@sifive.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
"Peter Zijlstra (Intel)" <peterz@infradead.org>,
"Rafael J. Wysocki" <rafael@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Sudeep Holla <sudeep.holla@arm.com>,
Thomas Gleixner <tglx@linutronix.de>,
Will Deacon <will.deacon@arm.com>,
linux-arm-kernel@lists.infradead.org
Subject: [RFT PATCH v5 5/5] RISC-V: Parse cpu topology during boot.
Date: Thu, 23 May 2019 17:06:52 -0700 [thread overview]
Message-ID: <20190524000653.13005-6-atish.patra@wdc.com> (raw)
In-Reply-To: <20190524000653.13005-1-atish.patra@wdc.com>
Currently, there are no topology defined for RISC-V.
Parse the cpu-map node from device tree and setup the
cpu topology.
CPU topology after applying the patch.
$cat /sys/devices/system/cpu/cpu2/topology/core_siblings_list
0-3
$cat /sys/devices/system/cpu/cpu3/topology/core_siblings_list
0-3
$cat /sys/devices/system/cpu/cpu3/topology/physical_package_id
0
$cat /sys/devices/system/cpu/cpu3/topology/core_id
3
Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
arch/riscv/Kconfig | 1 +
arch/riscv/kernel/smpboot.c | 3 +++
2 files changed, 4 insertions(+)
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index ee32c66e1af3..be319d902275 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -46,6 +46,7 @@ config RISCV
select PCI_MSI if PCI
select RISCV_TIMER
select GENERIC_IRQ_MULTI_HANDLER
+ select GENERIC_ARCH_TOPOLOGY if SMP
select ARCH_HAS_PTE_SPECIAL
select ARCH_HAS_MMIOWB
select HAVE_EBPF_JIT if 64BIT
diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c
index 7a0b62252524..54f89d5b19ba 100644
--- a/arch/riscv/kernel/smpboot.c
+++ b/arch/riscv/kernel/smpboot.c
@@ -16,6 +16,7 @@
* GNU General Public License for more details.
*/
+#include <linux/arch_topology.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/kernel.h>
@@ -43,6 +44,7 @@ static DECLARE_COMPLETION(cpu_running);
void __init smp_prepare_boot_cpu(void)
{
+ init_cpu_topology();
}
void __init smp_prepare_cpus(unsigned int max_cpus)
@@ -146,6 +148,7 @@ asmlinkage void __init smp_callin(void)
trap_init();
notify_cpu_starting(smp_processor_id());
+ update_siblings_masks(smp_processor_id());
set_cpu_online(smp_processor_id(), 1);
/*
* Remote TLB flushes are ignored while the CPU is offline, so emit
--
2.21.0
prev parent reply other threads:[~2019-05-24 0:07 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-24 0:06 [RFT PATCH v5 0/5] Unify CPU topology across ARM & RISC-V Atish Patra
2019-05-24 0:06 ` [RFT PATCH v5 1/5] Documentation: DT: arm: add support for sockets defining package boundaries Atish Patra
2019-05-24 0:06 ` [RFT PATCH v5 2/5] dt-binding: cpu-topology: Move cpu-map to a common binding Atish Patra
2019-05-24 0:06 ` [RFT PATCH v5 3/5] cpu-topology: Move cpu topology code to common code Atish Patra
2019-05-24 8:13 ` Greg Kroah-Hartman
2019-05-24 8:57 ` Sudeep Holla
2019-05-24 9:38 ` Will Deacon
2019-05-29 10:48 ` Sudeep Holla
2019-05-29 17:24 ` Atish Patra
2019-05-24 0:06 ` [RFT PATCH v5 4/5] arm: Use common cpu_topology structure and functions Atish Patra
2019-05-29 15:10 ` Sudeep Holla
2019-05-24 0:06 ` Atish Patra [this message]
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