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From: Dmitry Osipenko <digetx@gmail.com>
To: Rob Herring <robh+dt@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Joseph Lo <josephl@nvidia.com>,
	Thierry Reding <thierry.reding@gmail.com>,
	Jonathan Hunter <jonathanh@nvidia.com>,
	Peter De Schrijver <pdeschrijver@nvidia.com>,
	Prashant Gaikwad <pgaikwad@nvidia.com>
Cc: devicetree@vger.kernel.org, linux-clk@vger.kernel.org,
	linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH v3 2/8] memory: tegra20-emc: Drop setting EMC rate to max on probe
Date: Fri, 24 May 2019 20:23:47 +0300	[thread overview]
Message-ID: <20190524172353.29087-3-digetx@gmail.com> (raw)
In-Reply-To: <20190524172353.29087-1-digetx@gmail.com>

The memory frequency scaling will be managed by tegra20-devfreq driver
and PM QoS once all the prerequisite patches will get upstreamed.
The parent clock is now managed by the clock driver and we also should
assume that PLLM rate can't be changed on some devices (Galaxy Tab 10.1
for example). Altogether there is no point in touching of clock's rate
from the EMC driver.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
---
 drivers/memory/tegra/tegra20-emc.c | 45 ------------------------------
 1 file changed, 45 deletions(-)

diff --git a/drivers/memory/tegra/tegra20-emc.c b/drivers/memory/tegra/tegra20-emc.c
index 9ee5bef49e47..55ac3863a354 100644
--- a/drivers/memory/tegra/tegra20-emc.c
+++ b/drivers/memory/tegra/tegra20-emc.c
@@ -424,41 +424,6 @@ static int emc_setup_hw(struct tegra_emc *emc)
 	return 0;
 }
 
-static int emc_init(struct tegra_emc *emc, unsigned long rate)
-{
-	int err;
-
-	err = clk_set_parent(emc->emc_mux, emc->backup_clk);
-	if (err) {
-		dev_err(emc->dev,
-			"failed to reparent to backup source: %d\n", err);
-		return err;
-	}
-
-	err = clk_set_rate(emc->pll_m, rate);
-	if (err) {
-		dev_err(emc->dev,
-			"failed to change pll_m rate: %d\n", err);
-		return err;
-	}
-
-	err = clk_set_parent(emc->emc_mux, emc->pll_m);
-	if (err) {
-		dev_err(emc->dev,
-			"failed to reparent to pll_m: %d\n", err);
-		return err;
-	}
-
-	err = clk_set_rate(emc->clk, rate);
-	if (err) {
-		dev_err(emc->dev,
-			"failed to change emc rate: %d\n", err);
-		return err;
-	}
-
-	return 0;
-}
-
 static int tegra_emc_probe(struct platform_device *pdev)
 {
 	struct device_node *np;
@@ -550,18 +515,8 @@ static int tegra_emc_probe(struct platform_device *pdev)
 		goto put_backup;
 	}
 
-	/* set DRAM clock rate to maximum */
-	err = emc_init(emc, emc->timings[emc->num_timings - 1].rate);
-	if (err) {
-		dev_err(&pdev->dev, "failed to initialize EMC clock rate: %d\n",
-			err);
-		goto unreg_notifier;
-	}
-
 	return 0;
 
-unreg_notifier:
-	clk_notifier_unregister(emc->clk, &emc->clk_nb);
 put_backup:
 	clk_put(emc->backup_clk);
 put_pll_m:
-- 
2.21.0


  parent reply	other threads:[~2019-05-24 17:24 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-05-24 17:23 [PATCH v3 0/8] memory: tegra: Introduce Tegra30 EMC driver Dmitry Osipenko
2019-05-24 17:23 ` [PATCH v3 1/8] clk: tegra20/30: Add custom EMC clock implementation Dmitry Osipenko
2019-06-13 10:49   ` Peter De Schrijver
2019-06-13 12:14     ` Dmitry Osipenko
2019-05-24 17:23 ` Dmitry Osipenko [this message]
2019-05-24 17:23 ` [PATCH v3 3/8] memory: tegra20-emc: Adapt for clock driver changes Dmitry Osipenko
2019-05-24 17:23 ` [PATCH v3 4/8] memory: tegra20-emc: Include io.h instead of iopoll.h Dmitry Osipenko
2019-05-24 17:23 ` [PATCH v3 5/8] memory: tegra20-emc: Replace clk_get_sys with devm_clk_get Dmitry Osipenko
2019-05-24 17:23 ` [PATCH v3 6/8] dt-bindings: memory: Add binding for NVIDIA Tegra30 External Memory Controller Dmitry Osipenko
2019-05-24 17:23 ` [PATCH v3 7/8] memory: tegra: Introduce Tegra30 EMC driver Dmitry Osipenko
2019-05-24 17:23 ` [PATCH v3 8/8] ARM: dts: tegra30: Add External Memory Controller node Dmitry Osipenko
2019-06-11  0:01 ` [PATCH v3 0/8] memory: tegra: Introduce Tegra30 EMC driver Dmitry Osipenko

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