LKML Archive on lore.kernel.org
help / color / mirror / Atom feed
From: Peter Zijlstra <peterz@infradead.org>
To: "Liang, Kan" <kan.liang@linux.intel.com>
Cc: acme@kernel.org, mingo@redhat.com, linux-kernel@vger.kernel.org,
	tglx@linutronix.de, jolsa@kernel.org, eranian@google.com,
	alexander.shishkin@linux.intel.com, ak@linux.intel.com
Subject: Re: [PATCH 4/9] perf/x86/intel: Support hardware TopDown metrics
Date: Wed, 29 May 2019 18:58:13 +0200	[thread overview]
Message-ID: <20190529165813.GC2623@hirez.programming.kicks-ass.net> (raw)
In-Reply-To: <110d6e3e-9f50-ad47-5a12-1ccf0b756602@linux.intel.com>

On Wed, May 29, 2019 at 10:42:10AM -0400, Liang, Kan wrote:
> On 5/29/2019 3:54 AM, Peter Zijlstra wrote:

> > cd09c0c40a97 ("perf events: Enable raw event support for Intel unhalted_reference_cycles event")
> > 
> > We used the fake event=0x00, umask=0x03 for CPU_CLK_UNHALTED.REF_TSC,
> > because that was not available as a generic event, *until now* it seems.
> > I see ICL actually has it as a generic event, which means we need to fix
> > up the constraint mask for that differently.
> > 
> 
> There is no change for REF_TSC on ICL.

Well, if I look at the SDM for May'19 (latest afaict), Volume 3, Chapter
19.3 'Performance Monitoring Events for Future Intel (C) Core(tm)
Processors' the table lists:

 Event Num.	Umask Value	Event Mask Mnemonic

 00H		03H		CPU_CLK_UNHALTED.REF_TSC

as a generic event, without constraints, unlike any of the preceding
uarchs, where that event was not available except through FIXED2.

That is most certainly a change.

> > But note that for all previous uarchs this event did not in fact exist.
> > 
> > It appears the TOPDOWN.SLOTS thing, which is available in in FIXED3 is
> > event=0x00, umask=0x04, is indeed a generic event too.
> 
> The SLOTS do have a generic event, TOPDOWN.SLOTS_P, event=0xA4, umask=0x1.
> 
> I think we need a fix as below for ICL, so the SLOT event can be extended to
> generic event.
> -	FIXED_EVENT_CONSTRAINT(0x0400, 3),	/* SLOTS */
> +	FIXED_EVENT_CONSTRAINT(0x01a4, 3),	/* TOPDOWN.SLOTS */

Then WTH is that 00H, 04H event listed in the table? Note the distinct
lack of 'Fixed Counter' or any other contraints in the 'Comments'
column.

  reply	other threads:[~2019-05-29 16:58 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-05-21 21:40 [PATCH 0/9] TopDown metrics support for Icelake kan.liang
2019-05-21 21:40 ` [PATCH 1/9] perf/core: Support a REMOVE transaction kan.liang
2019-05-21 21:40 ` [PATCH 2/9] perf/x86/intel: Basic support for metrics counters kan.liang
2019-05-28 12:05   ` Peter Zijlstra
2019-05-28 18:20     ` Liang, Kan
2019-05-28 12:15   ` Peter Zijlstra
2019-05-28 18:21     ` Liang, Kan
2019-05-29  7:28       ` Peter Zijlstra
2019-05-29 14:40         ` Liang, Kan
2019-05-29 16:46           ` Peter Zijlstra
2019-05-29  8:14   ` Peter Zijlstra
2019-05-21 21:40 ` [PATCH 3/9] perf/x86/intel: Support overflows on SLOTS kan.liang
2019-05-28 12:20   ` Peter Zijlstra
2019-05-28 18:22     ` Liang, Kan
2019-05-21 21:40 ` [PATCH 4/9] perf/x86/intel: Support hardware TopDown metrics kan.liang
2019-05-28 12:43   ` Peter Zijlstra
2019-05-28 18:23     ` Liang, Kan
2019-05-29  7:30       ` Peter Zijlstra
2019-05-28 12:53   ` Peter Zijlstra
2019-05-28 12:56   ` Peter Zijlstra
2019-05-28 13:32     ` Peter Zijlstra
2019-05-28 13:30   ` Peter Zijlstra
2019-05-28 18:24     ` Liang, Kan
2019-05-29  7:34       ` Peter Zijlstra
2019-05-29 14:41         ` Liang, Kan
2019-05-28 13:43   ` Peter Zijlstra
2019-05-28 18:24     ` Liang, Kan
2019-05-29  7:54       ` Peter Zijlstra
2019-05-29 14:42         ` Liang, Kan
2019-05-29 16:58           ` Peter Zijlstra [this message]
2019-06-04 20:39             ` Liang, Kan
2019-05-28 13:48   ` Peter Zijlstra
2019-05-28 18:24     ` Liang, Kan
2019-05-29  7:57       ` Peter Zijlstra
2019-05-29 14:42         ` Liang, Kan
2019-05-21 21:40 ` [PATCH 5/9] perf/x86/intel: Set correct weight for TopDown metrics events kan.liang
2019-05-28 13:50   ` Peter Zijlstra
2019-05-21 21:40 ` [PATCH 6/9] perf/x86/intel: Export new TopDown metrics events for Icelake kan.liang
2019-05-21 21:40 ` [PATCH 7/9] perf/x86/intel: Disable sampling read slots and topdown kan.liang
2019-05-28 13:52   ` Peter Zijlstra
2019-05-28 18:25     ` Liang, Kan
2019-05-29  7:58       ` Peter Zijlstra
2019-05-21 21:40 ` [PATCH 8/9] perf, tools, stat: Support new per thread TopDown metrics kan.liang
2019-05-21 21:40 ` [PATCH 9/9] perf, tools: Add documentation for topdown metrics kan.liang

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20190529165813.GC2623@hirez.programming.kicks-ass.net \
    --to=peterz@infradead.org \
    --cc=acme@kernel.org \
    --cc=ak@linux.intel.com \
    --cc=alexander.shishkin@linux.intel.com \
    --cc=eranian@google.com \
    --cc=jolsa@kernel.org \
    --cc=kan.liang@linux.intel.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=mingo@redhat.com \
    --cc=tglx@linutronix.de \
    --subject='Re: [PATCH 4/9] perf/x86/intel: Support hardware TopDown metrics' \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).